diff options
| author | Audrey Pearson <apearson@raptorengineeringinc.com> | 2015-10-08 12:47:24 -0500 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-10-14 21:22:52 +0000 |
| commit | 83e4c5613eecc5283d9a66997dc90e26384f9284 (patch) | |
| tree | 9893e5caf603bd8eea5d975137626c6eb0c04441 /src/southbridge/intel/fsp_rangeley/early_init.c | |
| parent | aa1b6b06ef506eeb4cc73139b473a0aeb9ee26ba (diff) | |
| download | coreboot-83e4c5613eecc5283d9a66997dc90e26384f9284.tar.gz coreboot-83e4c5613eecc5283d9a66997dc90e26384f9284.tar.bz2 coreboot-83e4c5613eecc5283d9a66997dc90e26384f9284.zip | |
cpu/amd/microcode: Update parser to use stock microcode blobs
The existing microcode update system used custom, manually generated microcode
blob files. This made updates very difficult. Update parser to use stock
microcode update files as provided by AMD.
Change-Id: I772b264ad167f2a5d629dab5d64d9b0ccab3a053
Signed-off-by: Audrey Pearson <apearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11829
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley/early_init.c')
0 files changed, 0 insertions, 0 deletions