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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-05 08:05:45 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-09 14:37:33 +0000 |
| commit | cbf957158806bcd5c733c45baa324559904c609c (patch) | |
| tree | 89649e264f785ceb76ce223094b3640135a1b920 /src/southbridge/intel/i82801dx/lpc.c | |
| parent | 2a0e3b25ea282491cba9d32a8f35d9a238db83c7 (diff) | |
| download | coreboot-cbf957158806bcd5c733c45baa324559904c609c.tar.gz coreboot-cbf957158806bcd5c733c45baa324559904c609c.tar.bz2 coreboot-cbf957158806bcd5c733c45baa324559904c609c.zip | |
drivers/pc80/rtc: Separate {get|set}_option() prototypes
Long-term plan is to support loading runtime configuration
from SPI flash as an alternative, so move these prototypes
outside pc80/.
Change-Id: Iad7b03dc985550da903d56b3deb5bd736013f8f1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38192
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801dx/lpc.c')
| -rw-r--r-- | src/southbridge/intel/i82801dx/lpc.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index a46f5a370793..0e2aead4e46d 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -22,6 +22,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> +#include <option.h> #include <pc80/mc146818rtc.h> #include <pc80/isa-dma.h> #include <arch/io.h> |