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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-12-30 12:59:39 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-03 22:33:29 +0000 |
| commit | dff185a28d00700660c14535e4d7e53f7fbc3eec (patch) | |
| tree | 0f5953cb996e52a45f071f83f22367eb1b5329a9 /src/southbridge/intel/i82801gx/acpi/ich7.asl | |
| parent | cd366349947cfe0a056a5913cca6b5151c32e8f6 (diff) | |
| download | coreboot-dff185a28d00700660c14535e4d7e53f7fbc3eec.tar.gz coreboot-dff185a28d00700660c14535e4d7e53f7fbc3eec.tar.bz2 coreboot-dff185a28d00700660c14535e4d7e53f7fbc3eec.zip | |
sb/intel/*: Use common files for PCIe ACPI
The result is that i82801{g,i,j}x now use the correct _PRT table for
their root port number.
Change-Id: I92bba3c669f3e6a44a42e19a88a33dfcfc2b9b42
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30528
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'src/southbridge/intel/i82801gx/acpi/ich7.asl')
| -rw-r--r-- | src/southbridge/intel/i82801gx/acpi/ich7.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/acpi/ich7.asl b/src/southbridge/intel/i82801gx/acpi/ich7.asl index c28f4b98a50d..38ca4831b137 100644 --- a/src/southbridge/intel/i82801gx/acpi/ich7.asl +++ b/src/southbridge/intel/i82801gx/acpi/ich7.asl @@ -163,7 +163,7 @@ Scope(\) #include "audio.asl" // PCI Express Ports -#include "pcie.asl" +#include <southbridge/intel/common/acpi/pcie.asl> // USB #include "usb.asl" |