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authorArthur Heymans <arthur@aheymans.xyz>2017-03-09 12:02:52 +0100
committerMartin Roth <martinroth@google.com>2017-03-22 17:55:53 +0100
commit3f111b0b11cf3d14b9aded601b6a1dd84f35a8dc (patch)
treea11b02549c808bd7a59ee762a73bd46561731ea3 /src/southbridge/intel/i82801gx/early_smbus.c
parent70a8e34853d4b01ab7a2089821c35715c59b4415 (diff)
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southbridge/intel/i82801gx: Fix problems found by checkpatch.pl
Change-Id: Iddc67e7c126ce19429afc24b021e385353564cb8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18705 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx/early_smbus.c')
-rw-r--r--src/southbridge/intel/i82801gx/early_smbus.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c
index 47fe5f6a7c51..93e9d6a6b5af 100644
--- a/src/southbridge/intel/i82801gx/early_smbus.c
+++ b/src/southbridge/intel/i82801gx/early_smbus.c
@@ -29,9 +29,8 @@ void enable_smbus(void)
dev = PCI_DEV(0x0, 0x1f, 0x3);
/* Check to make sure we've got the right device. */
- if (pci_read_config16(dev, 0x2) != 0x27da) {
+ if (pci_read_config16(dev, 0x2) != 0x27da)
die("SMBus controller not found!");
- }
/* Set SMBus I/O base. */
pci_write_config32(dev, SMB_BASE,
@@ -51,7 +50,7 @@ void enable_smbus(void)
printk(BIOS_DEBUG, "SMBus controller enabled.\n");
}
-int smbus_read_byte(unsigned device, unsigned address)
+int smbus_read_byte(unsigned int device, unsigned int address)
{
return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
}