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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-03-20 22:32:02 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2017-04-11 11:51:04 +0200 |
| commit | 2a7c519c89fc05c3640ee457883829b1d7221f0e (patch) | |
| tree | 80e152ae5d2d73b53e2b30430f52add42d378d18 /src/southbridge/intel/i82801gx/i82801gx.h | |
| parent | 4f4410dcbc56b14d1a078f078baab754046a5c69 (diff) | |
| download | coreboot-2a7c519c89fc05c3640ee457883829b1d7221f0e.tar.gz coreboot-2a7c519c89fc05c3640ee457883829b1d7221f0e.tar.bz2 coreboot-2a7c519c89fc05c3640ee457883829b1d7221f0e.zip | |
sb/intel/i82801gx: Add i2c_block_read to smbus.h
Using i2c_block_read speeds up reading SPD four to fivefold compared
to sequential byte read.
TESTED on Intel D945GCLF.
Change-Id: I6d768a2ba128329168f26445a4fca6921c0c8642
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18927
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx.h')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 85cf6dbd5333..0dc4c0b9fd94 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -50,6 +50,8 @@ void gpi_route_interrupt(u8 gpi, u8 mode); #else void enable_smbus(void); int smbus_read_byte(unsigned int device, unsigned int address); +int i2c_block_read(unsigned int device, unsigned int cmd, unsigned int bytes, + u8 *buf); int southbridge_detect_s3_resume(void); #endif #endif |