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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-22 10:43:32 +0100 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-11-24 06:04:40 +0000 |
| commit | 9f0e21a4dae864809e9651403ab5bad48e784bee (patch) | |
| tree | 83de1263981849065f94147f3c96f65d276af3e1 /src/southbridge/intel/i82801gx/i82801gx.h | |
| parent | 0f633f7f7f1ff38f9f55d98fd0c5e5c26b2a2e07 (diff) | |
| download | coreboot-9f0e21a4dae864809e9651403ab5bad48e784bee.tar.gz coreboot-9f0e21a4dae864809e9651403ab5bad48e784bee.tar.bz2 coreboot-9f0e21a4dae864809e9651403ab5bad48e784bee.zip | |
sb/intel/i82801gx: Use "sb/intel/common/tco.h" macros
Also, use {read,write}_pmbase16() in lpc.c file instead of inw/out.
Change-Id: Id281a3478051c4876ccbe26452d8744769c86654
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69878
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx.h')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 68a32dfa55d6..cf76a4029bdf 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -320,7 +320,6 @@ void ich7_setup_cir(void); #define DEVACT_STS 0x44 #define SS_CNT 0x50 #define C3_RES 0x54 -#define TCO1_CNT 0x68 #endif /* __ACPI__ */ #endif /* SOUTHBRIDGE_INTEL_I82801GX_I82801GX_H */ |