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authorElyes HAOUAS <ehaouas@noos.fr>2019-05-01 16:56:36 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-05-07 16:01:35 +0000
commit551a75923ec7e7bacaf6da79b38eda5c3b3821ad (patch)
tree32d10123e44a9e7e8c699e532b2c8fe8f2ac781c /src/southbridge/intel/i82801gx
parent30bc9f415d9564de90fc0c6c6a92462ce3ce7c06 (diff)
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sb/{ICH7,NM10,PCH}: Use common watchdog_off function
Change-Id: I704780b6ae7238560dcb72fc027addc1089e0674 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32533 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: David Guckian
Diffstat (limited to 'src/southbridge/intel/i82801gx')
-rw-r--r--src/southbridge/intel/i82801gx/Kconfig1
-rw-r--r--src/southbridge/intel/i82801gx/Makefile.inc2
-rw-r--r--src/southbridge/intel/i82801gx/watchdog.c50
3 files changed, 1 insertions, 52 deletions
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index a7d65c52bb8e..2d6e938eba03 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -30,6 +30,7 @@ config SOUTHBRIDGE_INTEL_I82801GX
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
select INTEL_HAS_TOP_SWAP
select SOUTHBRIDGE_INTEL_COMMON_SMM
+ select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
if SOUTHBRIDGE_INTEL_I82801GX
diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc
index b72ca235f5e5..32a4bf533321 100644
--- a/src/southbridge/intel/i82801gx/Makefile.inc
+++ b/src/southbridge/intel/i82801gx/Makefile.inc
@@ -30,8 +30,6 @@ ramstage-y += usb_ehci.c
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
-ramstage-y += watchdog.c
-
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
romstage-y += early_smbus.c
diff --git a/src/southbridge/intel/i82801gx/watchdog.c b/src/southbridge/intel/i82801gx/watchdog.c
deleted file mode 100644
index 12284b46c16a..000000000000
--- a/src/southbridge/intel/i82801gx/watchdog.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <arch/io.h>
-#include <device/pci_ops.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <watchdog.h>
-
-void watchdog_off(void)
-{
- struct device *dev;
- unsigned long value, base;
-
- /* Turn off the ICH7 watchdog. */
- dev = pcidev_on_root(0x1f, 0);
-
- /* Enable I/O space. */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 10);
- pci_write_config16(dev, 0x04, value);
-
- /* Get TCO base. */
- base = (pci_read_config32(dev, 0x40) & 0x0fffe) + 0x60;
-
- /* Disable the watchdog timer. */
- value = inw(base + 0x08);
- value |= 1 << 11;
- outw(value, base + 0x08);
-
- /* Clear TCO timeout status. */
- outw(0x0008, base + 0x04);
- outw(0x0002, base + 0x06);
-
- printk(BIOS_DEBUG, "ICH7 watchdog disabled\n");
-}