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| author | Angel Pons <th3fanbus@gmail.com> | 2022-08-10 23:04:48 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-08-23 14:04:47 +0000 |
| commit | a0be874637f509efe0e4f960ff8316096788a39c (patch) | |
| tree | b132938f60a98d0966b91222c6c54bb20198d9fc /src/southbridge/intel/i82801jx/Makefile.inc | |
| parent | ccf8134b5ea8d566f6f587264455213328bfeb7c (diff) | |
| download | coreboot-a0be874637f509efe0e4f960ff8316096788a39c.tar.gz coreboot-a0be874637f509efe0e4f960ff8316096788a39c.tar.bz2 coreboot-a0be874637f509efe0e4f960ff8316096788a39c.zip | |
{sb,soc}/intel: Do not require hda_verb.c
Just use the conditional inclusion through `device/Makefile.inc`.
Change-Id: Id363a97460ae2cfe4b10d491d4ef06394eb530c2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/southbridge/intel/i82801jx/Makefile.inc')
| -rw-r--r-- | src/southbridge/intel/i82801jx/Makefile.inc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801jx/Makefile.inc b/src/southbridge/intel/i82801jx/Makefile.inc index f4893c2ea443..b5fbb77398ee 100644 --- a/src/southbridge/intel/i82801jx/Makefile.inc +++ b/src/southbridge/intel/i82801jx/Makefile.inc @@ -19,8 +19,6 @@ ramstage-y += thermal.c ramstage-y += usb_ehci.c ramstage-y += ../common/pciehp.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c - smm-y += smihandler.c CPPFLAGS_common += -I$(src)/southbridge/intel/i82801jx/include |