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authorAngel Pons <th3fanbus@gmail.com>2020-07-03 12:41:48 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-08 22:18:20 +0000
commit55d148ca3766a63fe0217fcbf119c63c3646b96e (patch)
tree1ee9bc3c779f6e053334f177a3dfdb304221f2f7 /src/southbridge/intel/lynxpoint/early_pch.c
parent2e25ac6afe84d9535fa6d89b847915e96f5d266b (diff)
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sb/intel/lynxpoint: Replace reg script with proper code
Why use a Rube Goldberg machine to write and then read one register? Change-Id: I282c12f162b5ae69c40729903c09ae81a14c9761 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43095 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/early_pch.c')
-rw-r--r--src/southbridge/intel/lynxpoint/early_pch.c16
1 files changed, 5 insertions, 11 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index 586dd8668c4b..0d9d8e97453b 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -17,15 +17,6 @@
#include <southbridge/intel/common/gpio.h>
#endif
-const struct rcba_config_instruction pch_early_config[] = {
- /* Enable IOAPIC */
- RCBA_SET_REG_16(OIC, 0x0100),
- /* PCH BWG says to read back the IOAPIC enable register */
- RCBA_READ_REG_16(OIC),
-
- RCBA_END_CONFIG,
-};
-
int pch_is_lp(void)
{
u8 id = pci_read_config8(PCH_LPC_DEV, PCI_DEVICE_ID + 1);
@@ -103,8 +94,11 @@ int early_pch_init(const void *gpio_map,
/* Enable SMBus for reading SPDs. */
enable_smbus();
- /* Early PCH RCBA settings */
- pch_config_rcba(pch_early_config);
+ /* Enable IOAPIC */
+ RCBA16(OIC) = 0x0100;
+
+ /* PCH BWG says to read back the IOAPIC enable register */
+ (void) RCBA16(OIC);
/* Mainboard RCBA settings */
pch_config_rcba(rcba_config);