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| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-03 13:05:10 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-09 16:23:16 +0000 |
| commit | 6e1c471f701b8ba1e9c07a87ecc73c8d855478dd (patch) | |
| tree | d0dad464e0d99f807bb7e0f183f76170fbd3f02c /src/southbridge/intel/lynxpoint/early_pch.c | |
| parent | 2cb3cc52380818c8301a7cd6f9a1295147d01186 (diff) | |
| download | coreboot-6e1c471f701b8ba1e9c07a87ecc73c8d855478dd.tar.gz coreboot-6e1c471f701b8ba1e9c07a87ecc73c8d855478dd.tar.bz2 coreboot-6e1c471f701b8ba1e9c07a87ecc73c8d855478dd.zip | |
haswell: Turn RCBA configuration into a function
Instead of passing around a pointer to an array, just write the relevant
registers directly. Note that intel/baskingridge used spaces to indent
line continuations and had to be replaced with tabs to quell Jenkins.
Change-Id: Ifa06a2ab24da9b8c6aac6480542fa32d04f6d6fe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/early_pch.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/early_pch.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index c6999a4fe75d..4d29564f3d5e 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -77,8 +77,7 @@ void __weak mainboard_config_superio(void) { } -int early_pch_init(const void *gpio_map, - const struct rcba_config_instruction *rcba_config) +int early_pch_init(const void *gpio_map) { int wake_from_s3; @@ -101,7 +100,7 @@ int early_pch_init(const void *gpio_map, (void) RCBA16(OIC); /* Mainboard RCBA settings */ - pch_config_rcba(rcba_config); + mainboard_config_rcba(); RCBA32_OR(FD, PCH_DISABLE_ALWAYS); |