diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-02-24 19:40:49 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-28 13:27:22 +0000 |
| commit | 0cd1a87d50177a9f6ad912e934ad5d918a952109 (patch) | |
| tree | 7ddec1fb1729fb1243f021206d2bc5f3528f69ce /src/southbridge/intel/lynxpoint/lpc.c | |
| parent | 9fc741d32f23939d389464958b4c4def1cc1cf01 (diff) | |
| download | coreboot-0cd1a87d50177a9f6ad912e934ad5d918a952109.tar.gz coreboot-0cd1a87d50177a9f6ad912e934ad5d918a952109.tar.bz2 coreboot-0cd1a87d50177a9f6ad912e934ad5d918a952109.zip | |
sb/intel/lynxpoint: Fix up comment
Change-Id: Ie46b63d192b8e4871442f6b0db5b1575168f89ce
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62342
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/lpc.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index ea84def99a96..71ce0806a964 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -691,8 +691,8 @@ static void pch_lpc_add_gen_io_resources(struct device *dev, int reg_value, int index) { /* - * Check if the register is enabled. If so and the base exceeds the - * device's default, claim range and add the resource. + * Check if the register is enabled. If so, and the base exceeds the + * device's default claim range, add the resource. */ if (reg_value & 1) { u16 base = reg_value & 0xfffc; |