summaryrefslogtreecommitdiffstats
path: root/src/southbridge/intel/lynxpoint/me.h
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2021-02-23 14:19:28 +0100
committerNico Huber <nico.h@gmx.de>2021-03-07 19:23:24 +0000
commit10274d83fc13228bdd4392817542a8add211486d (patch)
tree564c7689f3f5f0b7591e3a29ac7d2fb2556bd0fb /src/southbridge/intel/lynxpoint/me.h
parentd32b51466efb563f15ab53ad02b9c5c3baca803c (diff)
downloadcoreboot-10274d83fc13228bdd4392817542a8add211486d.tar.gz
coreboot-10274d83fc13228bdd4392817542a8add211486d.tar.bz2
coreboot-10274d83fc13228bdd4392817542a8add211486d.zip
sb/intel/lynxpoint: Finalize ME in ramstage
Performing ME finalization in SMM does not seem to be required. Tested on Asrock B85M Pro4, ME still gets finalized successfully. Change-Id: I9fde40a54f3fb8da2fba46c531443fdd2e067077 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51036 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/me.h')
-rw-r--r--src/southbridge/intel/lynxpoint/me.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/me.h b/src/southbridge/intel/lynxpoint/me.h
index 2a0523394eb5..1767b54ffc40 100644
--- a/src/southbridge/intel/lynxpoint/me.h
+++ b/src/southbridge/intel/lynxpoint/me.h
@@ -317,8 +317,7 @@ int intel_early_me_init(void);
int intel_early_me_uma_size(void);
int intel_early_me_init_done(u8 status);
-void intel_me_finalize_smm(void);
-void intel_me8_finalize_smm(void);
+void intel_me_finalize(struct device *dev);
/*
* ME to BIOS Payload Datastructures and definitions. The ordering of the