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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-03 11:17:34 +0200 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-10-06 18:14:45 +0000 |
| commit | 33e2b923e9f786e706cb5ea18f39b28299a85953 (patch) | |
| tree | 1bd2066b03f2cb45fb48cf5a4275213b88eab98b /src/southbridge/intel | |
| parent | b6ad6b66a85e68eaefa1cd400650531e00f25f4b (diff) | |
| download | coreboot-33e2b923e9f786e706cb5ea18f39b28299a85953.tar.gz coreboot-33e2b923e9f786e706cb5ea18f39b28299a85953.tar.bz2 coreboot-33e2b923e9f786e706cb5ea18f39b28299a85953.zip | |
sb/intel/common/gpio.c: Clean up includes
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Iba746431496b30daba098716337b688314eac283
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/common/gpio.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/southbridge/intel/common/gpio.c b/src/southbridge/intel/common/gpio.c index 20071af68e2b..f32532c1cf6b 100644 --- a/src/southbridge/intel/common/gpio.c +++ b/src/southbridge/intel/common/gpio.c @@ -1,10 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <arch/io.h> #include <device/pci_ops.h> -#include <device/device.h> -#include <device/pci.h> +#include <device/pci_type.h> +#include <stdint.h> #include "gpio.h" |