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| author | Patrick Georgi <patrick@georgi-clan.de> | 2011-10-28 20:28:03 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-10-28 22:17:10 +0200 |
| commit | 1da104647dc2828a6594bdc7b5ae119923dbcffa (patch) | |
| tree | 3e4d1e8acc0e37bf0f5d93c4367d072c1629755b /src/southbridge/sis | |
| parent | 0f8590f9ca8026af62efa510a1c717d2d0729e3d (diff) | |
| download | coreboot-1da104647dc2828a6594bdc7b5ae119923dbcffa.tar.gz coreboot-1da104647dc2828a6594bdc7b5ae119923dbcffa.tar.bz2 coreboot-1da104647dc2828a6594bdc7b5ae119923dbcffa.zip | |
Get rid of AUTO_XIP_ROM_BASE
That value is now generated from a code address and CONFIG_XIP_ROM_SIZE.
This works as MTRRs are fully specified by their size and any address
within the range.
Change-Id: Id35d34eaf3be37f59cd2a968e3327d333ba71a34
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/348
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/sis')
0 files changed, 0 insertions, 0 deletions