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| author | Martin Roth <martin@coreboot.org> | 2019-10-23 21:46:03 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-30 11:16:56 +0000 |
| commit | ff744bf0eee875a03dc98dd6792e3ed0ff4456a0 (patch) | |
| tree | 691260ffe71abac0bb8e2a5607b0d6f1cfb16028 /src/southbridge/ti/pci1x2x/pci1x2x.c | |
| parent | 5331a7cff9ebf6f92542eee53e6556a4d5a0dc75 (diff) | |
| download | coreboot-ff744bf0eee875a03dc98dd6792e3ed0ff4456a0.tar.gz coreboot-ff744bf0eee875a03dc98dd6792e3ed0ff4456a0.tar.bz2 coreboot-ff744bf0eee875a03dc98dd6792e3ed0ff4456a0.zip | |
src/southbridge: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Iee2056a50a1201626fa29194afdbfc1f11094420
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36333
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/ti/pci1x2x/pci1x2x.c')
| -rw-r--r-- | src/southbridge/ti/pci1x2x/pci1x2x.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/ti/pci1x2x/pci1x2x.c b/src/southbridge/ti/pci1x2x/pci1x2x.c index bfb5ab92dfc0..1789f6e2324b 100644 --- a/src/southbridge/ti/pci1x2x/pci1x2x.c +++ b/src/southbridge/ti/pci1x2x/pci1x2x.c @@ -38,8 +38,8 @@ static void ti_pci1x2y_init(struct device *dev) pci_write_config8(dev, 0x92, pci_read_config8(dev, 0x92) | 0x02); } -static void ti_pci1x2y_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) +static void ti_pci1x2y_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { /* * Enable change sub-vendor ID. Clear the bit 5 to enable to write |