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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-02 20:02:23 +0200 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-10-06 18:12:46 +0000 |
| commit | ddd43de5862cf5a4e098c6c9f802d21f8f4af710 (patch) | |
| tree | 41e919deaf90ca44bf4ae7c0f8ff2d4fc4fc01c7 /src/southbridge | |
| parent | 606f4f6c2d2ab4e913bedcd9b2d4ca3c15215778 (diff) | |
| download | coreboot-ddd43de5862cf5a4e098c6c9f802d21f8f4af710.tar.gz coreboot-ddd43de5862cf5a4e098c6c9f802d21f8f4af710.tar.bz2 coreboot-ddd43de5862cf5a4e098c6c9f802d21f8f4af710.zip | |
sb/intel/common/rtc.c: Clean up includes
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Ibcd61e44f8e165627851e2c5325985f0765634b6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/common/rtc.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/southbridge/intel/common/rtc.c b/src/southbridge/intel/common/rtc.c index ef30d9a53a04..933ac6349ff1 100644 --- a/src/southbridge/intel/common/rtc.c +++ b/src/southbridge/intel/common/rtc.c @@ -3,11 +3,12 @@ #define __SIMPLE_DEVICE__ #include <console/console.h> -#include <device/pci_def.h> #include <device/pci_ops.h> -#include <security/vboot/vbnv.h> -#include <pc80/mc146818rtc.h> +#include <device/pci_type.h> #include <elog.h> +#include <pc80/mc146818rtc.h> +#include <security/vboot/vbnv.h> + #include "pmutil.h" #include "rtc.h" |