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author | Werner Zeh <werner.zeh@siemens.com> | 2018-11-14 10:55:52 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-22 14:47:21 +0000 |
commit | f13a6f9e0531e251087f752440411018bfd91e97 (patch) | |
tree | 1eb63315e8f27f38db0cd3e0112d519944681d6f /src/southbridge | |
parent | 26d706bb333827c983abf7d734ce5af621d7adeb (diff) | |
download | coreboot-f13a6f9e0531e251087f752440411018bfd91e97.tar.gz coreboot-f13a6f9e0531e251087f752440411018bfd91e97.tar.bz2 coreboot-f13a6f9e0531e251087f752440411018bfd91e97.zip |
sb/intel/common: Reset Pre-OP after atomic SPI cycle is finished
Make sure that the Pre-Op register is cleared when an atomic cycle has
been finished without errors.
Change-Id: Ied88337125b125474b411e2f39f668171d15bfac
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/29634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/common/spi.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 71655bc0fda6..96b580e52fb6 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -2,6 +2,7 @@ * Copyright (c) 2011 The Chromium OS Authors. * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger * Copyright (C) 2011 Stefan Tauner + * Copyright (C) 2018 Siemens AG * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -608,7 +609,7 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, return -1; } - return 0; + goto spi_xfer_exit; } /* @@ -673,6 +674,7 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, } } +spi_xfer_exit: /* Clear atomic preop now that xfer is done */ writew_(0, cntlr->preop); |