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| author | Matt DeVillier <matt.devillier@gmail.com> | 2019-01-26 18:42:35 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-28 13:38:49 +0000 |
| commit | 9e946079e82f1f2b7fbab498a9eec16d1fcd9216 (patch) | |
| tree | 0206194637555fa77f5205a56b68892b3a2cc2d6 /src/superio/smsc/lpc47n207/early_serial.c | |
| parent | faa3d4680c3adaa7e8397733392a6d089c459373 (diff) | |
| download | coreboot-9e946079e82f1f2b7fbab498a9eec16d1fcd9216.tar.gz coreboot-9e946079e82f1f2b7fbab498a9eec16d1fcd9216.tar.bz2 coreboot-9e946079e82f1f2b7fbab498a9eec16d1fcd9216.zip | |
soc/intel/skylake: select FSP_M_XIP if MAINBOARD_USES_FSP2_0
Select FSP_M_XIP if MAINBOARD_USES_FSP2_0, since all SkyKabylake
boards require FSP-M XIP when FSP 2.0 is used, and since not
having it selected results in a non-booting image.
Also, put select FSP_T_XIP if FSP_CAR in proper alphabetical order.
Change-Id: I6d3986eda18297b12490cefb236f5de5faca6550
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/superio/smsc/lpc47n207/early_serial.c')
0 files changed, 0 insertions, 0 deletions