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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-08 20:55:24 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-08 20:55:24 +0000
commit7fa0819ecf076c283c942d4af5e9bcfaf8c4bd49 (patch)
tree523f6bd8880d1ccd39e97067feafc2bfb625d22e /src/superio/smsc/lpc47n217
parentf648d619c994f856d6ca7d86fe18c532a974d31b (diff)
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Add #include guards to all Super I/O header files (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/smsc/lpc47n217')
-rw-r--r--src/superio/smsc/lpc47n217/chip.h5
-rw-r--r--src/superio/smsc/lpc47n217/lpc47n217.h11
2 files changed, 13 insertions, 3 deletions
diff --git a/src/superio/smsc/lpc47n217/chip.h b/src/superio/smsc/lpc47n217/chip.h
index 4369c263bd51..0eda25f6b125 100644
--- a/src/superio/smsc/lpc47n217/chip.h
+++ b/src/superio/smsc/lpc47n217/chip.h
@@ -18,6 +18,9 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#ifndef SUPERIO_SMSC_LPC47N217_CHIP_H
+#define SUPERIO_SMSC_LPC47N217_CHIP_H
+
struct chip_operations;
extern struct chip_operations superio_smsc_lpc47n217_ops;
@@ -26,3 +29,5 @@ extern struct chip_operations superio_smsc_lpc47n217_ops;
struct superio_smsc_lpc47n217_config {
struct uart8250 com1, com2;
};
+
+#endif
diff --git a/src/superio/smsc/lpc47n217/lpc47n217.h b/src/superio/smsc/lpc47n217/lpc47n217.h
index 3795821129b7..e0ee010c3595 100644
--- a/src/superio/smsc/lpc47n217/lpc47n217.h
+++ b/src/superio/smsc/lpc47n217/lpc47n217.h
@@ -18,12 +18,17 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* These are arbitrary, but must match declarations in the mainboard config file.
- * Values chosen to match SMSC 47B37x.
- */
+#ifndef SUPERIO_SMSC_LPC47N217_LPC47N217_H
+#define SUPERIO_SMSC_LPC47N217_LPC47N217_H
+/*
+ * These are arbitrary, but must match declarations in the mainboard
+ * devicetree.cb file. Values chosen to match SMSC LPC47B37x.
+ */
#define LPC47N217_PP 3 /* Parallel Port */
#define LPC47N217_SP1 4 /* Com1 */
#define LPC47N217_SP2 5 /* Com2 */
#define LPC47N217_MAX_CONFIG_REGISTER 0x39
+
+#endif