src/superio: Remove unused superio chips

These SIOs are not being used or tested by abuild, so remove them from the
tree. The only 3 currently unused SIOs that don't get removed here have board
ports in review.

src/superio/fintek/f71805f
src/superio/fintek/f71872
src/superio/intel/i8900
src/superio/ite/it8671f
src/superio/ite/it8716f
src/superio/nsc/pc87309
src/superio/nsc/pc87360
src/superio/nsc/pc87366
src/superio/nsc/pc97317
src/superio/smsc/dme1737
src/superio/smsc/lpc47b272
src/superio/smsc/lpc47b397
src/superio/smsc/sch4037
src/superio/smsc/sio1036
src/superio/via/vt1211
src/superio/winbond/w83697hf
src/superio/winbond/wpcd376i

Signed-off-by: Martin Roth <martin@coreboot.org>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I61d486d2c1e2b85eb292eaa78316c36e1735ebf4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35428
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

25 files changed, 0 insertions, 1076 deletions

diff --git a/src/superio/smsc/dme1737/Kconfig b/src/superio/smsc/dme1737/Kconfig
deleted file mode 100644
index 20cb12c0f0be..000000000000
--- a/src/superio/smsc/dme1737/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_DME1737
-	bool
diff --git a/src/superio/smsc/dme1737/Makefile.inc b/src/superio/smsc/dme1737/Makefile.inc
deleted file mode 100644
index e106a02aa4c5..000000000000
--- a/src/superio/smsc/dme1737/Makefile.inc
+++ /dev/null
@@ -1,21 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2000 AG Electronics Ltd.
-## Copyright (C) 2003-2004 Linux Networx
-## Copyright (C) 2004 Tyan
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_SMSC_DME1737) += early_serial.c
-romstage-$(CONFIG_SUPERIO_SMSC_DME1737) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_SMSC_DME1737) += superio.c
diff --git a/src/superio/smsc/dme1737/dme1737.h b/src/superio/smsc/dme1737/dme1737.h
deleted file mode 100644
index f40cc354887b..000000000000
--- a/src/superio/smsc/dme1737/dme1737.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SMSC_DME1737_H
-#define SUPERIO_SMSC_DME1737_H
-
-#define DME1737_FDC		0	/* Floppy */
-#define DME1737_PP		3	/* Parallel Port */
-#define DME1737_SP1		4	/* Com1 */
-#define DME1737_SP2		5	/* Com2 */
-#define DME1737_KBC		7	/* Keyboard & Mouse */
-#define DME1737_RT		10	/* Runtime reg*/
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_SMSC_DME1737_H */
diff --git a/src/superio/smsc/dme1737/early_serial.c b/src/superio/smsc/dme1737/early_serial.c
deleted file mode 100644
index 58ad1776413b..000000000000
--- a/src/superio/smsc/dme1737/early_serial.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-#include "dme1737.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0xaa, port);
-}
-
-void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
-	pnp_enter_conf_state(dev);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
-	pnp_set_enable(dev, 1);
-	pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/dme1737/superio.c b/src/superio/smsc/dme1737/superio.c
deleted file mode 100644
index 0bfd3b811e10..000000000000
--- a/src/superio/smsc/dme1737/superio.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <device/smbus.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "dme1737.h"
-
-static void dme1737_init(struct device *dev)
-{
-
-	if (!dev->enabled)
-		return;
-
-	switch (dev->path.pnp.device) {
-	case DME1737_KBC:
-		pc_keyboard_init(NO_AUX_DEVICE);
-		break;
-	}
-}
-
-static struct device_operations ops = {
-	.read_resources   = pnp_read_resources,
-	.set_resources    = pnp_set_resources,
-	.enable_resources = pnp_enable_resources,
-	.enable           = pnp_alt_enable,
-	.init             = dme1737_init,
-	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
-	{ NULL, DME1737_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
-	{ NULL, DME1737_PP,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
-	{ NULL, DME1737_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-	{ NULL, DME1737_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-	{ NULL, DME1737_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
-		0x07ff, 0x07ff, },
-	{ NULL, DME1737_RT,  PNP_IO0, 0x0780, },
-};
-
-static void enable_dev(struct device *dev)
-{
-	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_dme1737_ops = {
-	CHIP_NAME("SMSC DME1737 Super I/O")
-	.enable_dev = enable_dev,
-};
diff --git a/src/superio/smsc/lpc47b272/Kconfig b/src/superio/smsc/lpc47b272/Kconfig
deleted file mode 100644
index 07e64728ee42..000000000000
--- a/src/superio/smsc/lpc47b272/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_LPC47B272
-	bool
diff --git a/src/superio/smsc/lpc47b272/Makefile.inc b/src/superio/smsc/lpc47b272/Makefile.inc
deleted file mode 100644
index 51d77d4f10c6..000000000000
--- a/src/superio/smsc/lpc47b272/Makefile.inc
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2005 Digital Design Corporation
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_SMSC_LPC47B272) += early_serial.c
-romstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.c
diff --git a/src/superio/smsc/lpc47b272/early_serial.c b/src/superio/smsc/lpc47b272/early_serial.c
deleted file mode 100644
index 26fdfafbc65f..000000000000
--- a/src/superio/smsc/lpc47b272/early_serial.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* Pre-RAM driver for SMSC LPC47B272 Super I/O chip. */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-#include "lpc47b272.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0xaa, port);
-}
-
-/**
- * Configure the base I/O port of the specified serial device and enable the
- * serial device.
- *
- * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
- * @param iobase Processor I/O port address to assign to this serial device.
- */
-void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
-	pnp_enter_conf_state(dev);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
-	pnp_set_enable(dev, 1);
-	pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h
deleted file mode 100644
index 3fbd04336420..000000000000
--- a/src/superio/smsc/lpc47b272/lpc47b272.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SMSC_LPC47B272_H
-#define SUPERIO_SMSC_LPC47B272_H
-
-#define LPC47B272_FDC              0   /* Floppy */
-#define LPC47B272_PP               3   /* Parallel Port */
-#define LPC47B272_SP1              4   /* Com1 */
-#define LPC47B272_SP2              5   /* Com2 */
-#define LPC47B272_KBC              7   /* Keyboard & Mouse */
-#define LPC47B272_RT              10   /* Runtime reg*/
-
-#define LPC47B272_MAX_CONFIG_REGISTER	0x5F
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_SMSC_LPC47B272_H */
diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c
deleted file mode 100644
index 6ac2d6dbf43d..000000000000
--- a/src/superio/smsc/lpc47b272/superio.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* RAM driver for SMSC LPC47B272 Super I/O chip. */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <device/smbus.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "lpc47b272.h"
-
-/**
- * Initialize the specified Super I/O device.
- *
- * Devices other than COM ports and the keyboard controller are ignored.
- * For COM ports, we configure the baud rate.
- *
- * @param dev Pointer to structure describing a Super I/O device.
- */
-static void lpc47b272_init(struct device *dev)
-{
-
-	if (!dev->enabled)
-		return;
-
-	switch (dev->path.pnp.device) {
-	case LPC47B272_KBC:
-		pc_keyboard_init(NO_AUX_DEVICE);
-		break;
-	}
-}
-
-static struct device_operations ops = {
-	.read_resources   = pnp_read_resources,
-	.set_resources    = pnp_set_resources,
-	.enable_resources = pnp_enable_resources,
-	.enable           = pnp_alt_enable,
-	.init             = lpc47b272_init,
-	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
-	{ NULL, LPC47B272_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
-	{ NULL, LPC47B272_PP,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
-	{ NULL, LPC47B272_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-	{ NULL, LPC47B272_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-	{ NULL, LPC47B272_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
-		0x07ff, 0x07ff, },
-	{ NULL, LPC47B272_RT,  PNP_IO0, 0x0780, },
-};
-
-/**
- * Create device structures and allocate resources to devices specified in the
- * pnp_dev_info array (above).
- *
- * @param dev Pointer to structure describing a Super I/O device.
- */
-static void enable_dev(struct device *dev)
-{
-	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_lpc47b272_ops = {
-	CHIP_NAME("SMSC LPC47B272 Super I/O")
-	.enable_dev = enable_dev
-};
diff --git a/src/superio/smsc/lpc47b397/Kconfig b/src/superio/smsc/lpc47b397/Kconfig
deleted file mode 100644
index 80264c4fa367..000000000000
--- a/src/superio/smsc/lpc47b397/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_LPC47B397
-	bool
diff --git a/src/superio/smsc/lpc47b397/Makefile.inc b/src/superio/smsc/lpc47b397/Makefile.inc
deleted file mode 100644
index ddb251d023de..000000000000
--- a/src/superio/smsc/lpc47b397/Makefile.inc
+++ /dev/null
@@ -1,21 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2000 AG Electronics Ltd.
-## Copyright (C) 2003-2004 Linux Networx
-## Copyright (C) 2004 Tyan
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_SMSC_LPC47B397) += early_serial.c
-romstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += superio.c
diff --git a/src/superio/smsc/lpc47b397/early_serial.c b/src/superio/smsc/lpc47b397/early_serial.c
deleted file mode 100644
index a07cd99d3254..000000000000
--- a/src/superio/smsc/lpc47b397/early_serial.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-#include "lpc47b397.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0xaa, port);
-}
-
-void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
-	pnp_enter_conf_state(dev);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
-	pnp_set_enable(dev, 1);
-	pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/lpc47b397/lpc47b397.h b/src/superio/smsc/lpc47b397/lpc47b397.h
deleted file mode 100644
index 5f3a5045abf5..000000000000
--- a/src/superio/smsc/lpc47b397/lpc47b397.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SMSC_LPC47B397_H
-#define SUPERIO_SMSC_LPC47B397_H
-
-#define LPC47B397_FDC		0	/* Floppy */
-#define LPC47B397_PP		3	/* Parallel Port */
-#define LPC47B397_SP1		4	/* Com1 */
-#define LPC47B397_SP2		5	/* Com2 */
-#define LPC47B397_KBC		7	/* Keyboard & Mouse */
-#define LPC47B397_HWM		8	/* HW Monitor */
-#define LPC47B397_RT		10	/* Runtime reg*/
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_SMSC_LPC47B397_H */
diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c
deleted file mode 100644
index 4b9e345145f1..000000000000
--- a/src/superio/smsc/lpc47b397/superio.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <console/console.h>
-#include <device/smbus.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "lpc47b397.h"
-
-static void enable_hwm_smbus(struct device *dev)
-{
-	/* Enable SensorBus register access. */
-	u8 reg8;
-
-	reg8 = pnp_read_config(dev, 0xf0);
-	reg8 |= (1 << 1);
-	pnp_write_config(dev, 0xf0, reg8);
-}
-
-static void lpc47b397_init(struct device *dev)
-{
-
-	if (!dev->enabled)
-		return;
-
-	switch (dev->path.pnp.device) {
-	case LPC47B397_KBC:
-		pc_keyboard_init(NO_AUX_DEVICE);
-		break;
-	}
-}
-
-static void lpc47b397_pnp_enable_resources(struct device *dev)
-{
-	pnp_enable_resources(dev);
-
-	pnp_enter_conf_mode(dev);
-	switch (dev->path.pnp.device) {
-	case LPC47B397_HWM:
-		printk(BIOS_DEBUG, "LPC47B397 SensorBus register access enabled\n");
-		pnp_set_logical_device(dev);
-		enable_hwm_smbus(dev);
-		break;
-	}
-	/* dump_pnp_device(dev); */
-	pnp_exit_conf_mode(dev);
-}
-
-static struct device_operations ops = {
-	.read_resources   = pnp_read_resources,
-	.set_resources    = pnp_set_resources,
-	.enable_resources = lpc47b397_pnp_enable_resources,
-	.enable           = pnp_alt_enable,
-	.init             = lpc47b397_init,
-	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
-};
-
-#define HWM_INDEX 0
-#define HWM_DATA  1
-#define SB_INDEX  0x0b
-#define SB_DATA0  0x0c
-#define SB_DATA1  0x0d
-#define SB_DATA2  0x0e
-#define SB_DATA3  0x0f
-
-static int lsmbus_read_byte(struct device *dev, u8 address)
-{
-	unsigned int device;
-	struct resource *res;
-	int result;
-
-	device = dev->path.i2c.device;
-
-	res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
-
-	pnp_write_index(res->base + HWM_INDEX, 0, device); /* Why 0? */
-
-	/* We only read it one byte one time. */
-	result = pnp_read_index(res->base + SB_INDEX, address);
-
-	return result;
-}
-
-static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
-{
-	unsigned int device;
-	struct resource *res;
-
-	device = dev->path.i2c.device;
-	res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
-
-	pnp_write_index(res->base+HWM_INDEX, 0, device); /* Why 0? */
-
-	/* We only write it one byte one time. */
-	pnp_write_index(res->base+SB_INDEX, address, val);
-
-	return 0;
-}
-
-static struct smbus_bus_operations lops_smbus_bus = {
-	/* .recv_byte  = lsmbus_recv_byte, */
-	/* .send_byte  = lsmbus_send_byte, */
-	.read_byte  = lsmbus_read_byte,
-	.write_byte = lsmbus_write_byte,
-};
-
-static struct device_operations ops_hwm = {
-	.read_resources   = pnp_read_resources,
-	.set_resources    = pnp_set_resources,
-	.enable_resources = lpc47b397_pnp_enable_resources,
-	.enable           = pnp_alt_enable,
-	.init             = lpc47b397_init,
-	.ops_smbus_bus    = &lops_smbus_bus,
-	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
-	{ NULL, LPC47B397_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
-	{ NULL, LPC47B397_PP,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
-	{ NULL, LPC47B397_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-	{ NULL, LPC47B397_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-	{ NULL, LPC47B397_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
-		0x07ff, 0x07ff, },
-	{ &ops_hwm, LPC47B397_HWM,  PNP_IO0, 0x07f0, },
-	{ NULL, LPC47B397_RT,  PNP_IO0, 0x0780, },
-};
-
-static void enable_dev(struct device *dev)
-{
-	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_lpc47b397_ops = {
-	CHIP_NAME("SMSC LPC47B397 Super I/O")
-	.enable_dev = enable_dev,
-};
diff --git a/src/superio/smsc/sch4037/Kconfig b/src/superio/smsc/sch4037/Kconfig
deleted file mode 100644
index ce87f75b2f62..000000000000
--- a/src/superio/smsc/sch4037/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_SCH4037
-	bool
diff --git a/src/superio/smsc/sch4037/Makefile.inc b/src/superio/smsc/sch4037/Makefile.inc
deleted file mode 100644
index ac7d7de652ba..000000000000
--- a/src/superio/smsc/sch4037/Makefile.inc
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2012 Advanced Micro Devices, Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-bootblock-$(CONFIG_SUPERIO_SMSC_SCH4037) += sch4037_early_init.c
-romstage-$(CONFIG_SUPERIO_SMSC_SCH4037) += sch4037_early_init.c
-ramstage-$(CONFIG_SUPERIO_SMSC_SCH4037) += superio.c
diff --git a/src/superio/smsc/sch4037/sch4037.h b/src/superio/smsc/sch4037/sch4037.h
deleted file mode 100644
index f0fa3cda0f4e..000000000000
--- a/src/superio/smsc/sch4037/sch4037.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SCH_4037_H
-#define SUPERIO_SCH_4037_H
-
-#define SCH4037_FDD              0            /* FDD */
-#define SCH4037_LPT              3            /* LPT */
-#define SMSCSUPERIO_SP1          4            /* Com1 */
-#define SMSCSUPERIO_SP2          5            /* Com2 */
-#define SCH4037_RTC              6            /* RTC */
-#define SCH4037_KBC              7            /* KBC */
-#define SCH4037_HWM              8            /* HWM */
-#define SCH4037_RUNTIME          0x0A         /* Runtime */
-#define SCH4037_XBUS             0x0B         /* X-BUS */
-
-void sch4037_early_init(unsigned port);
-
-#endif /* SUPERIO_SCH_4037_H */
diff --git a/src/superio/smsc/sch4037/sch4037_early_init.c b/src/superio/smsc/sch4037/sch4037_early_init.c
deleted file mode 100644
index a416ab8358b8..000000000000
--- a/src/superio/smsc/sch4037/sch4037_early_init.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-
-#include "sch4037.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
-	unsigned port = dev >> 8;
-	outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
-	unsigned port = dev >> 8;
-	outb(0xaa, port);
-}
-
-void sch4037_early_init(unsigned port)
-{
-	pnp_devfn_t dev;
-
-	dev = PNP_DEV(port, SMSCSUPERIO_SP1);
-	pnp_enter_conf_state(dev);
-
-	/* Auto power management */
-	pnp_write_config(dev, 0x22, 0x38); /* BIT3+BIT4+BIT5 */
-	pnp_write_config(dev, 0x23, 0);
-
-	/* Enable SMSC UART 0 */
-	dev = PNP_DEV(port, SMSCSUPERIO_SP1);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-
-	pnp_set_iobase(dev, PNP_IDX_IO0, CONFIG_TTYS0_BASE);
-	pnp_set_irq(dev, PNP_IDX_IRQ0, 0x4);
-
-	/* Enabled High speed, disabled MIDI support. */
-	pnp_write_config(dev, 0xF0, 0x02);
-	pnp_set_enable(dev, 1);
-
-	/* Enable keyboard */
-	dev = PNP_DEV(port, SCH4037_KBC);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-	pnp_set_irq(dev, 0x70, 1);   /* IRQ 1 */
-	pnp_set_irq(dev, 0x72, 12);   /* IRQ 12 */
-	pnp_set_enable(dev, 1);
-
-	pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/sch4037/superio.c b/src/superio/smsc/sch4037/superio.c
deleted file mode 100644
index 5e49aa73c5a8..000000000000
--- a/src/superio/smsc/sch4037/superio.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* RAM driver for the SMSC KBC1100 Super I/O chip */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-
-#include "sch4037.h"
-
-static void sch4037_init(struct device *dev)
-{
-	if (!dev->enabled) {
-		return;
-	}
-
-	switch (dev->path.pnp.device) {
-		case SCH4037_KBC:
-			pc_keyboard_init(NO_AUX_DEVICE);
-			break;
-	}
-}
-
-static struct device_operations ops = {
-	.read_resources   = pnp_read_resources,
-	.set_resources    = pnp_set_resources,
-	.enable_resources = pnp_enable_resources,
-	.enable           = pnp_alt_enable,
-	.init             = sch4037_init,
-	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
-	{ NULL, SCH4037_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
-		0x7ff, 0x7ff, },
-};
-
-static void enable_dev(struct device *dev)
-{
-	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_sch4037_ops = {
-	CHIP_NAME("SMSC SCH4037 Super I/O")
-		.enable_dev = enable_dev,
-};
diff --git a/src/superio/smsc/sio1036/Kconfig b/src/superio/smsc/sio1036/Kconfig
deleted file mode 100644
index df519de71b61..000000000000
--- a/src/superio/smsc/sio1036/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_SIO1036
-	bool
diff --git a/src/superio/smsc/sio1036/Makefile.inc b/src/superio/smsc/sio1036/Makefile.inc
deleted file mode 100644
index e9fdae2dc815..000000000000
--- a/src/superio/smsc/sio1036/Makefile.inc
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2012 Advanced Micro Devices, Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-bootblock-$(CONFIG_SUPERIO_SMSC_SIO1036) += sio1036_early_init.c
-romstage-$(CONFIG_SUPERIO_SMSC_SIO1036) += sio1036_early_init.c
-ramstage-$(CONFIG_SUPERIO_SMSC_SIO1036) += superio.c
diff --git a/src/superio/smsc/sio1036/sio1036.h b/src/superio/smsc/sio1036/sio1036.h
deleted file mode 100644
index 610beba59c79..000000000000
--- a/src/superio/smsc/sio1036/sio1036.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SMSC_SIO1306_H
-#define SUPERIO_SMSC_SIO1306_H
-
-#define SIO1036_SP1		0 /* Com1 */
-
-#define UART_POWER_DOWN		(1 << 7)
-#define LPT_POWER_DOWN		(1 << 2)
-#define IR_OUTPUT_MUX		(1 << 6)
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_SMSC_SIO1306_H */
diff --git a/src/superio/smsc/sio1036/sio1036_early_init.c b/src/superio/smsc/sio1036/sio1036_early_init.c
deleted file mode 100644
index 47f317f0429d..000000000000
--- a/src/superio/smsc/sio1036/sio1036_early_init.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <stdint.h>
-
-#include "sio1036.h"
-
-static inline void sio1036_enter_conf_state(pnp_devfn_t dev)
-{
-	unsigned port = dev >> 8;
-	outb(0x55, port);
-}
-
-static inline void sio1036_exit_conf_state(pnp_devfn_t dev)
-{
-	unsigned port = dev >> 8;
-	outb(0xaa, port);
-}
-
-/* Detect SMSC SIO1036 LPC Debug Card status */
-static u8 detect_sio1036_chip(unsigned port)
-{
-	pnp_devfn_t dev = PNP_DEV(port, SIO1036_SP1);
-	unsigned data;
-
-	sio1036_enter_conf_state(dev);
-	data = pnp_read_config(dev, 0x0D);
-	sio1036_exit_conf_state(dev);
-
-	/* Detect SMSC SIO1036 chip */
-	if (data == 0x82) {
-		/* Found SMSC SIO1036 chip */
-		return 0;
-	}
-	else {
-		return 1;
-	};
-}
-
-void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
-	unsigned port = dev >> 8;
-
-	if (detect_sio1036_chip(port) != 0)
-		return;
-
-	sio1036_enter_conf_state(dev);
-
-	/* Enable SMSC UART 0 */
-	/* Valid configuration cycle */
-	pnp_write_config(dev, 0x00, 0x28);
-
-	/* PP power/mode/cr lock */
-	pnp_write_config(dev, 0x01, 0x98 | LPT_POWER_DOWN);
-	pnp_write_config(dev, 0x02, 0x08 | UART_POWER_DOWN);
-
-	/*Auto power management*/
-	pnp_write_config(dev, 0x07, 0x00);
-
-	/*ECP FIFO threhod */
-	pnp_write_config(dev, 0x0A, 0x00 | IR_OUTPUT_MUX);
-
-	/*GPIO direction register 2 */
-	pnp_write_config(dev, 0x033, 0x00);
-
-	/*UART Mode */
-	pnp_write_config(dev, 0x0C, 0x02);
-
-	/* GPIO polarity regisgter 2 */
-	pnp_write_config(dev, 0x034, 0x00);
-
-	/* Enable SMSC UART 0 */
-	/*Set base io address */
-	pnp_write_config(dev, 0x25, (u8)(iobase >> 2));
-
-	/* Set UART IRQ onto 0x04 */
-	pnp_write_config(dev, 0x28, 0x04);
-
-	sio1036_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/sio1036/superio.c b/src/superio/smsc/sio1036/superio.c
deleted file mode 100644
index a192831bcda1..000000000000
--- a/src/superio/smsc/sio1036/superio.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* RAM driver for the SMSC SIO1036 Super I/O chip */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <stdlib.h>
-
-#include "sio1036.h"
-
-static void sio1036_init(struct device *dev)
-{
-	if (!dev->enabled) {
-		return;
-	}
-}
-
-static struct device_operations ops = {
-	.read_resources   = pnp_read_resources,
-	.set_resources    = pnp_set_resources,
-	.enable_resources = pnp_enable_resources,
-	.enable           = pnp_alt_enable,
-	.init             = sio1036_init,
-	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
-	{ NULL, SIO1036_SP1,  PNP_IO0 | PNP_IRQ0, 0x07f8, },
-};
-
-static void enable_dev(struct device *dev)
-{
-	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_sio1036_ops = {
-	CHIP_NAME("SMSC SIO1036 Super I/O")
-	.enable_dev = enable_dev
-};