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| author | Marc Jones <marc.jones@se-eng.com> | 2015-04-22 23:16:31 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-24 00:37:37 +0200 |
| commit | 786879777a70cb82c94588e6d14c8fdd18ab4345 (patch) | |
| tree | a3dea1ee11739a00b63ffead17d7cd29078a70b8 /src/vendorcode/intel/Kconfig | |
| parent | be34797e4c2a5b74bb8fcbbe9e4301b471d185e5 (diff) | |
| download | coreboot-786879777a70cb82c94588e6d14c8fdd18ab4345.tar.gz coreboot-786879777a70cb82c94588e6d14c8fdd18ab4345.tar.bz2 coreboot-786879777a70cb82c94588e6d14c8fdd18ab4345.zip | |
fsp: Move fsp to fsp1_0
Prepare for FSP 1.1 integration by moving the FSP to a FSP 1.0 specific
directory. See follow-on patches for sharing of common code.
Change-Id: Ic58cb4074c65b91d119909132a012876d7ee7b74
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/9970
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/intel/Kconfig')
| -rw-r--r-- | src/vendorcode/intel/Kconfig | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig index 21b48ae4d71b..312f4de998a6 100644 --- a/src/vendorcode/intel/Kconfig +++ b/src/vendorcode/intel/Kconfig @@ -19,7 +19,7 @@ config FSP_VENDORCODE_HEADER_PATH string - default "fsp/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X - default "fsp/ivybridge_i89xx" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX - default "fsp/baytrail" if SOC_INTEL_FSP_BAYTRAIL - default "fsp/rangeley" if CPU_INTEL_FSP_MODEL_406DX + default "fsp1_0/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X + default "fsp1_0/ivybridge_i89xx" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX + default "fsp1_0/baytrail" if SOC_INTEL_FSP_BAYTRAIL + default "fsp1_0/rangeley" if CPU_INTEL_FSP_MODEL_406DX |