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authorJonathan Zhang <jonzhang@fb.com>2020-06-09 17:56:53 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-25 11:57:06 +0000
commit6d27778973edf6bdebfa812eac8893d52961a891 (patch)
tree8023f5c4d98247b5ef3ceb18b8820e1131753f7e /src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/FspGlobalData.h
parentc9222f956763d20397152a44985bdb4abdb19e2d (diff)
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vendorcode/intel: Add edk2-stable202005 support
This patch includes (edk2/edk2-stable202005) all required headers for edk2-stable202005 quarterly EDK2 tag from EDK2 github project using below command: >> git clone https://github.com/tianocore/edk2.git vedk2-stable202005 Only include necessary header files. MdePkg/Include/Base.h was updated to avoid compilation errors through safeguarding definitions for MIN, MAX, NULL, ABS, ARRAY_SIZE. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: I3172505d9b829647ee1208c87623172f10b39310 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42239 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/FspGlobalData.h')
-rw-r--r--src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/FspGlobalData.h78
1 files changed, 78 insertions, 0 deletions
diff --git a/src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/FspGlobalData.h b/src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/FspGlobalData.h
new file mode 100644
index 000000000000..2ff4c0ea5845
--- /dev/null
+++ b/src/vendorcode/intel/edk2/edk2-stable202005/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -0,0 +1,78 @@
+/** @file
+
+ Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _FSP_GLOBAL_DATA_H_
+#define _FSP_GLOBAL_DATA_H_
+
+#include <FspEas.h>
+
+#define FSP_IN_API_MODE 0
+#define FSP_IN_DISPATCH_MODE 1
+
+#pragma pack(1)
+
+typedef enum {
+ TempRamInitApiIndex,
+ FspInitApiIndex,
+ NotifyPhaseApiIndex,
+ FspMemoryInitApiIndex,
+ TempRamExitApiIndex,
+ FspSiliconInitApiIndex,
+ FspMultiPhaseSiInitApiIndex,
+ FspApiIndexMax
+} FSP_API_INDEX;
+
+typedef struct {
+ VOID *DataPtr;
+ UINT32 MicrocodeRegionBase;
+ UINT32 MicrocodeRegionSize;
+ UINT32 CodeRegionBase;
+ UINT32 CodeRegionSize;
+} FSP_PLAT_DATA;
+
+#define FSP_GLOBAL_DATA_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'D')
+#define FSP_PERFORMANCE_DATA_SIGNATURE SIGNATURE_32 ('P', 'E', 'R', 'F')
+#define FSP_PERFORMANCE_DATA_TIMER_MASK 0xFFFFFFFFFFFFFF
+
+typedef struct {
+ UINT32 Signature;
+ UINT8 Version;
+ UINT8 Reserved1[3];
+ UINT32 CoreStack;
+ UINT32 StatusCode;
+ UINT32 Reserved2[8];
+ FSP_PLAT_DATA PlatformData;
+ FSP_INFO_HEADER *FspInfoHeader;
+ VOID *UpdDataPtr;
+ VOID *TempRamInitUpdPtr;
+ VOID *MemoryInitUpdPtr;
+ VOID *SiliconInitUpdPtr;
+ UINT8 ApiIdx;
+ ///
+ /// 0: FSP in API mode; 1: FSP in DISPATCH mode
+ ///
+ UINT8 FspMode;
+ UINT8 OnSeparateStack;
+ UINT8 Reserved3;
+ UINT32 NumberOfPhases;
+ UINT32 PhasesExecuted;
+ ///
+ /// To store function parameters pointer
+ /// so it can be retrieved after stack switched.
+ ///
+ VOID *FunctionParameterPtr;
+ UINT8 Reserved4[16];
+ UINT32 PerfSig;
+ UINT16 PerfLen;
+ UINT16 Reserved5;
+ UINT32 PerfIdx;
+ UINT64 PerfData[32];
+} FSP_GLOBAL_DATA;
+
+#pragma pack()
+
+#endif