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author | Jonathan Zhang <jonzhang@meta.com> | 2023-01-04 12:23:11 -0800 |
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committer | David Hendricks <david.hendricks@gmail.com> | 2023-01-29 18:43:25 +0000 |
commit | 9355bc0919c0ff7814f421416c5a6bb21bfc3d3f (patch) | |
tree | 1e459535bfefac44fcd71ed7506637e6ef2b0e00 /src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_enhancedwarningloglib.h | |
parent | 55bc2d3e1491017e5640153fe7b7992a20a1a76d (diff) | |
download | coreboot-9355bc0919c0ff7814f421416c5a6bb21bfc3d3f.tar.gz coreboot-9355bc0919c0ff7814f421416c5a6bb21bfc3d3f.tar.bz2 coreboot-9355bc0919c0ff7814f421416c5a6bb21bfc3d3f.zip |
vendorcode/intel/fsp/fsp2_0: add SPR-SP FSP header files
Intel Sapphire Rapids Scalable Processor was product launched
on Jan. 10, 2023.
Add the FSP/HOB header files corresponding to 2022 ww43 git tag
EGLSTRM.0.RPB.0090.D.03.
Change-Id: I818da37c10f40045d98a9f73e82034c3fe6459e2
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71948
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_enhancedwarningloglib.h')
-rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_enhancedwarningloglib.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_enhancedwarningloglib.h b/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_enhancedwarningloglib.h new file mode 100644 index 000000000000..1a86caa32c7c --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/hob_enhancedwarningloglib.h @@ -0,0 +1,40 @@ +/** @file + Interface header file for the Enhanced warning log library class. + + @copyright + INTEL CONFIDENTIAL + Copyright 2018 - 2021 Intel Corporation. <BR> + + The source code contained or described herein and all documents related to the + source code ("Material") are owned by Intel Corporation or its suppliers or + licensors. Title to the Material remains with Intel Corporation or its suppliers + and licensors. The Material may contain trade secrets and proprietary and + confidential information of Intel Corporation and its suppliers and licensors, + and is protected by worldwide copyright and trade secret laws and treaty + provisions. No part of the Material may be used, copied, reproduced, modified, + published, uploaded, posted, transmitted, distributed, or disclosed in any way + without Intel's prior express written permission. + + No license under any patent, copyright, trade secret or other intellectual + property right is granted to or conferred upon you by disclosure or delivery + of the Materials, either expressly, by implication, inducement, estoppel or + otherwise. Any license under such intellectual property rights must be + express and approved by Intel in writing. + + Unless otherwise agreed by Intel in writing, you may not remove or alter + this notice or any other notice embedded in Materials by Intel or + Intel's suppliers or licensors in any way. +**/ + +#ifndef _HOB_ENHANCEDWARNINGLOG_H_ +#define _HOB_ENHANCEDWARNINGLOG_H_ + +#include <fsp/util.h> +#include "EnhancedWarningLogLib.h" + +#define FSP_HOB_EWLID_GUID { \ + 0x00, 0x58, 0xe0, 0xd8, 0x5e, 0x00, 0x62, 0x44,\ + 0xaa, 0x3d, 0x9c, 0x6b, 0x47, 0x4, 0x92, 0x0b \ +} + +#endif //_HOB_ENHANCEDWARNINGLOG_H_ |