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author | Xi Chen <xixi.chen@mediatek.com> | 2021-02-05 11:45:12 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2021-03-08 01:49:52 +0000 |
commit | 022b1b992f24890a04851dccc2829284a0431d6a (patch) | |
tree | 1179f795920c5591f13b837a57353e5740bfc91c /src/vendorcode/mediatek/mt8192/include/emi.h | |
parent | 69da75411218c705b6b7375664523be707cb5258 (diff) | |
download | coreboot-022b1b992f24890a04851dccc2829284a0431d6a.tar.gz coreboot-022b1b992f24890a04851dccc2829284a0431d6a.tar.bz2 coreboot-022b1b992f24890a04851dccc2829284a0431d6a.zip |
vendor: mediatek: Add mediatek mt8192 dram initialization code
This is the DRAM initialization code from the reference
implementation released by Mediatek for MT8192.
The DRAM calibration code can be taken as a standalone
library, used by different boot loaders for initializing
DRAM and following a different coding style (coreboot was
using Linux Kernel coding style), so we have to put it
in vendor code folder.
Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: I3853204578069c6abf52689ea6f5d88841414bd4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/vendorcode/mediatek/mt8192/include/emi.h')
-rw-r--r-- | src/vendorcode/mediatek/mt8192/include/emi.h | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/src/vendorcode/mediatek/mt8192/include/emi.h b/src/vendorcode/mediatek/mt8192/include/emi.h new file mode 100644 index 000000000000..e94f74161faa --- /dev/null +++ b/src/vendorcode/mediatek/mt8192/include/emi.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ + +#ifndef __EMI_H__ +#define __EMI_H__ + +#include <soc/addressmap.h> +#include <dramc_top.h> + +#define EMI_APB_BASE EMI_BASE + +#if __ETT__ +#define emi_log printf +#elif __FLASH_TOOL_DA__ +#define emi_log LOGD +#else +#define emi_log(_x_...) printk(BIOS_INFO, _x_) +#endif + +struct isu_info_t { + unsigned int buf_size; + unsigned long long buf_addr; + unsigned long long ver_addr; + unsigned long long con_addr; +}; + +#define EMI_ISU_BUF_SIZE 0x800000 +#define LAST_EMI_MAGIC_PATTERN 0x19870611 +typedef struct { + unsigned int isu_magic; + unsigned int isu_ctrl; + unsigned int isu_dram_type; + unsigned int isu_diff_us; + unsigned int isu_buf_l; + unsigned int isu_buf_h; + unsigned int isu_version; + unsigned int snst_last; + unsigned int snst_past; + unsigned int os_flag_sspm; + unsigned int os_flag_ap; +} LAST_EMI_INFO_T; +#define DEF_LAST_EMI LAST_EMI_INFO_T + +void emi_init(void); +void emi_init2(void); +void clr_emi_mpu_prot(void); +void dis_emi_apb_prot(void); +int get_row_width_by_emi(unsigned int rank); +int get_channel_nr_by_emi(void); +int get_rank_nr_by_emi(void); +void get_rank_size_by_emi(unsigned long long dram_rank_size[DRAMC_MAX_RK]); +void set_cen_emi_cona(unsigned int cona_val); +void set_cen_emi_conf(unsigned int conf_val); +void set_cen_emi_conh(unsigned int conh_val); +void set_chn_emi_cona(unsigned int cona_val); +void set_chn_emi_conc(unsigned int conc_val); +unsigned int get_cen_emi_cona(void); +unsigned int get_chn_emi_cona(void); +void phy_addr_to_dram_addr(dram_addr_t *dram_addr, unsigned long long phy_addr); +unsigned int set_emi_before_rank1_mem_test(void); +void restore_emi_after_rank1_mem_test(void); +void get_emi_isu_info(struct isu_info_t *isu_info_ptr); +void reserve_emi_isu_buf(void); +void reserve_emi_mbist_buf(void); +void record_emi_snst(void); +unsigned long long platform_memory_size(void); + +#endif /* __EMI_H__ */ + |