diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2022-02-03 15:21:04 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-07 14:07:41 +0000 |
| commit | 0d6972fcb23a8067e2e182459dda4f639461234c (patch) | |
| tree | 20c83e86cbfa572f250c7e3405d45cf4d51f2c08 /src/vendorcode | |
| parent | 51c75ac0dffcc7cf34827eb0df0bc0980255af5d (diff) | |
| download | coreboot-0d6972fcb23a8067e2e182459dda4f639461234c.tar.gz coreboot-0d6972fcb23a8067e2e182459dda4f639461234c.tar.bz2 coreboot-0d6972fcb23a8067e2e182459dda4f639461234c.zip | |
vc/amd/cezanne: Add support to map UARTs
This will allow coreboot to directly write to the UART controller.
BUG=b:215599230
TEST=Try mapping the uart on guybrush
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ibd346cec2994e612f2901bb91d572982ce2ed5e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h index 4cf9e7068657..d88bfe18011f 100644 --- a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h +++ b/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h @@ -88,10 +88,17 @@ enum fch_io_device { FCH_IO_DEVICE_MISC, FCH_IO_DEVICE_AOAC, FCH_IO_DEVICE_IOPORT, + FCH_IO_DEVICE_UART, FCH_IO_DEVICE_END, }; +enum fch_uart_id { + FCH_UART_ID_0 = 0, + FCH_UART_ID_1 = 1, + FCH_UART_ID_MAX, +}; + enum fch_i2c_controller_id { FCH_I2C_CONTROLLER_ID_0 = 0, FCH_I2C_CONTROLLER_ID_1 = 1, |