diff options
| author | Sugnan Prabhu S <sugnan.prabhu.s@intel.com> | 2021-07-18 06:32:52 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-21 16:22:59 +0000 |
| commit | 061a93f93d2a3460423a50448e428cf08d282fff (patch) | |
| tree | 41313ef5ec1d961f5abe6b848ee506152620489f /src | |
| parent | 430f0b44554d1f48faa817b6316c30dca2a4f18e (diff) | |
| download | coreboot-061a93f93d2a3460423a50448e428cf08d282fff.tar.gz coreboot-061a93f93d2a3460423a50448e428cf08d282fff.tar.bz2 coreboot-061a93f93d2a3460423a50448e428cf08d282fff.zip | |
mb/google/brya: Add variant specific soc chip config update
This patch adds support for variant specific soc chip config update
function.
Change-Id: Ic3a3ae0b409433e6dfa102c5e7a6322d4f78f730
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/mainboard.c | 11 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h | 2 |
2 files changed, 13 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/mainboard.c b/src/mainboard/google/brya/mainboard.c index 1bdd013fec3f..1b9e09a214c2 100644 --- a/src/mainboard/google/brya/mainboard.c +++ b/src/mainboard/google/brya/mainboard.c @@ -4,8 +4,19 @@ #include <baseboard/variants.h> #include <device/device.h> #include <ec/ec.h> +#include <soc/ramstage.h> #include <vendorcode/google/chromeos/chromeos.h> +void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config) +{ + variant_update_soc_chip_config(config); +} + +__weak void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) +{ + /* default implementation does nothing */ +} + static void mainboard_init(void *chip_info) { const struct pad_config *base_pads; diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h index 26640f17cd28..c938de820d56 100644 --- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h @@ -3,6 +3,7 @@ #ifndef __BASEBOARD_VARIANTS_H__ #define __BASEBOARD_VARIANTS_H__ +#include <chip.h> #include <soc/gpio.h> #include <soc/meminit.h> #include <stdint.h> @@ -19,5 +20,6 @@ const struct cros_gpio *variant_cros_gpios(size_t *num); const struct mb_cfg *variant_memory_params(void); int variant_memory_sku(void); bool variant_is_half_populated(void); +void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config); #endif /*__BASEBOARD_VARIANTS_H__ */ |