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| author | Patrick Georgi <pgeorgi@google.com> | 2021-01-13 09:16:41 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-15 23:54:07 +0000 |
| commit | 0b7d3a154e9966524256a06a3fb1c6de87358976 (patch) | |
| tree | a0eed6ed3d43a403ef938766ba83bc8bbf11e677 /src | |
| parent | 2a1638a9cead257115ff82b18862d506015378b2 (diff) | |
| download | coreboot-0b7d3a154e9966524256a06a3fb1c6de87358976.tar.gz coreboot-0b7d3a154e9966524256a06a3fb1c6de87358976.tar.bz2 coreboot-0b7d3a154e9966524256a06a3fb1c6de87358976.zip | |
build system: Remove flock calls from intermediate processing
Now that intermediate coreboot.pre manipulation is serialized within
the build system, remove the flock calls.
Change-Id: I8a767918aec5fcb7127ebb19ac46e58bed7967fb
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/ec/hp/kbc1126/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/common/firmware/Makefile.inc | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/ec/hp/kbc1126/Makefile.inc b/src/ec/hp/kbc1126/Makefile.inc index 92a0a72c02df..e1367577702c 100644 --- a/src/ec/hp/kbc1126/Makefile.inc +++ b/src/ec/hp/kbc1126/Makefile.inc @@ -21,7 +21,7 @@ ifeq ($(CONFIG_KBC1126_FIRMWARE),y) printf " Building kbc1126_ec_insert.\n" $(MAKE) -C util/kbc1126 printf " KBC1126 Inserting KBC1126 firmware blobs.\n" - flock $< $(KBC1126_EC_INSERT) $(obj)/coreboot.pre \ + $(KBC1126_EC_INSERT) $(obj)/coreboot.pre \ $(CONFIG_KBC1126_FW1_OFFSET) $(CONFIG_KBC1126_FW2_OFFSET) endif diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index a1771e8582e8..900d48b01f75 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -170,7 +170,7 @@ STONEYRIDGE_FWM_ROM_POSITION=$(call int-add, \ $(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom) printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \ "$(STONEYRIDGE_FWM_ROM_POSITION)" - flock $< dd if=$(obj)/amdfw.rom \ + dd if=$(obj)/amdfw.rom \ of=$(obj)/coreboot.pre conv=notrunc bs=1 \ seek=$(STONEYRIDGE_FWM_ROM_POSITION) >/dev/null 2>&1 diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 5a85fb6addf8..caa49b874cef 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -159,7 +159,7 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \ ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) $(call add_intermediate, add_amdfw, $(obj)/coreboot.pre $(obj)/amdfw.rom) printf " DD Adding AMD Firmware\n" - flock $< dd if=$(obj)/amdfw.rom \ + dd if=$(obj)/amdfw.rom \ of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1 else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc index 127da190b439..d5a48fd6f974 100644 --- a/src/southbridge/intel/common/firmware/Makefile.inc +++ b/src/southbridge/intel/common/firmware/Makefile.inc @@ -35,7 +35,7 @@ add_intel_firmware: $(call strip_quotes,$(CONFIG_EC_BIN_PATH)) endif add_intel_firmware: $(obj)/coreboot.pre $(IFDTOOL) printf " DD Adding Intel Firmware Descriptor\n" - flock $< dd if=$(IFD_BIN_PATH) \ + dd if=$(IFD_BIN_PATH) \ of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 ifeq ($(CONFIG_VALIDATE_INTEL_DESCRIPTOR),y) $(objutil)/ifdtool/ifdtool \ |