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authorVladimir Serbinenko <phcoder@gmail.com>2015-05-20 11:14:25 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2015-05-21 20:50:49 +0200
commit11b01a957439d0406b607ee8c8160e319672bf45 (patch)
tree3aa0702209aeba5a38ee11e80bcb77ea2177468f /src
parentb890a1228d22b2d48792575986d4750e88751c8b (diff)
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Kill ENABLE_TPM.
It's used only in P470 and lynxpoint machines. Remove it from other southbridges. New machines should use src/drivers/pc80/tpm. Change-Id: I4741e76df4c6204d65562f016abac9ed60558432 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10268 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/lpc.asl24
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/acpi/lpc.asl24
-rw-r--r--src/southbridge/intel/fsp_rangeley/acpi/lpc.asl24
-rw-r--r--src/southbridge/intel/i82801ix/acpi/lpc.asl24
4 files changed, 0 insertions, 96 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
index 432f3af7062f..83c04d50459b 100644
--- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
@@ -220,28 +220,4 @@ Device (LPCB)
}
#include "acpi/superio.asl"
-
-#ifdef ENABLE_TPM
- Device (TPM) // Trusted Platform Module
- {
- Name(_HID, EISAID("IFX0102"))
- Name(_CID, 0x310cd041)
- Name(_UID, 1)
-
- Method(_STA, 0)
- {
- If (TPMP) {
- Return (0xf)
- }
- Return (0x0)
- }
-
- Name(_CRS, ResourceTemplate() {
- IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
- IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
- Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
- IRQ (Edge, Activehigh, Exclusive) { 6 }
- })
- }
-#endif
}
diff --git a/src/southbridge/intel/fsp_bd82x6x/acpi/lpc.asl b/src/southbridge/intel/fsp_bd82x6x/acpi/lpc.asl
index 432f3af7062f..83c04d50459b 100644
--- a/src/southbridge/intel/fsp_bd82x6x/acpi/lpc.asl
+++ b/src/southbridge/intel/fsp_bd82x6x/acpi/lpc.asl
@@ -220,28 +220,4 @@ Device (LPCB)
}
#include "acpi/superio.asl"
-
-#ifdef ENABLE_TPM
- Device (TPM) // Trusted Platform Module
- {
- Name(_HID, EISAID("IFX0102"))
- Name(_CID, 0x310cd041)
- Name(_UID, 1)
-
- Method(_STA, 0)
- {
- If (TPMP) {
- Return (0xf)
- }
- Return (0x0)
- }
-
- Name(_CRS, ResourceTemplate() {
- IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
- IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
- Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
- IRQ (Edge, Activehigh, Exclusive) { 6 }
- })
- }
-#endif
}
diff --git a/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl b/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
index 8d6e2cca993b..fce5449744ca 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
+++ b/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
@@ -227,28 +227,4 @@ Device (LPCB)
// Include mainboard's superio.asl file.
#include "acpi/superio.asl"
-
-#ifdef ENABLE_TPM
- Device (TPM) // Trusted Platform Module
- {
- Name(_HID, EISAID("IFX0102"))
- Name(_CID, 0x310cd041)
- Name(_UID, 1)
-
- Method(_STA, 0)
- {
- If (TPMP) {
- Return (0xf)
- }
- Return (0x0)
- }
-
- Name(_CRS, ResourceTemplate() {
- IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
- IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
- Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
- IRQ (Edge, Activehigh, Exclusive) { 6 }
- })
- }
-#endif
}
diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl
index 34e918be9cab..2609dcd5ac7b 100644
--- a/src/southbridge/intel/i82801ix/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl
@@ -203,30 +203,6 @@ Device (LPCB)
#include "acpi/superio.asl"
-#ifdef ENABLE_TPM
- Device (TPM) // Trusted Platform Module
- {
- Name(_HID, EISAID("IFX0102"))
- Name(_CID, 0x310cd041)
- Name(_UID, 1)
-
- Method(_STA, 0)
- {
- If (TPMP) {
- Return (0xf)
- }
- Return (0x0)
- }
-
- Name(_CRS, ResourceTemplate() {
- IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
- IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
- Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
- IRQ (Edge, Activehigh, Exclusive) { 6 }
- })
- }
-#endif
-
Device (PS2K) // Keyboard
{
Name(_HID, EISAID("PNP0303"))