soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support

Add APIs and required parameters for creating Maxim 98927
and Realtek 5336 SSP endpoints in NHLT table.

BUG=chrome-os-partner:62051
BRANCH=None
TEST=check that NHLT table created is created properly

Change-Id: Ica302aab05c5364faf4923dc5327be8e8eaae8b4
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Signed-off-by: M Naveen <naveen.m@intel.com>
Reviewed-on: https://review.coreboot.org/18213
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>

5 files changed, 165 insertions, 1 deletions

diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 9dcafe63b1a0..725a25db80f3 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -59,6 +59,7 @@ config CPU_SPECIFIC_OPTIONS
 	select TSC_CONSTANT_RATE
 	select TSC_SYNC_MFENCE
 	select UDELAY_TSC
+	select ACPI_NHLT
 
 config MAINBOARD_USES_FSP2_0
 	bool
@@ -234,6 +235,18 @@ config NHLT_SSM4567
 	help
 	  Include DSP firmware settings for ssm4567 smart amplifier.
 
+config NHLT_RT5663
+	bool
+	default n
+	help
+	  Include DSP firmware settings for rt5663 headset codec.
+
+config NHLT_MAX98927
+	bool
+	default n
+	help
+	  Include DSP firmware settings for max98927 amplifier.
+
 config SKIP_FSP_CAR
 	bool "Skip cache as RAM setup in FSP"
 	default y
diff --git a/src/soc/intel/skylake/include/soc/nhlt.h b/src/soc/intel/skylake/include/soc/nhlt.h
index 008dd0d907ef..39930036e6a0 100644
--- a/src/soc/intel/skylake/include/soc/nhlt.h
+++ b/src/soc/intel/skylake/include/soc/nhlt.h
@@ -60,4 +60,16 @@ int nhlt_soc_add_ssm4567(struct nhlt *nhlt, int hwlink);
  */
 int nhlt_soc_add_max98357(struct nhlt *nhlt, int hwlink);
 
+/*
+ * Add rt5663 headset codec on provided SSP link. Return 0 on success, < 0
+ * on error.
+ */
+int nhlt_soc_add_rt5663(struct nhlt *nhlt, int hwlink);
+
+/*
+ * Add max98927 amplifier in stereo configuration on provided SSP link.
+ * Return 0 on success, < 0 on error.
+ */
+int nhlt_soc_add_max98927(struct nhlt *nhlt, int hwlink);
+
 #endif
diff --git a/src/soc/intel/skylake/nhlt/Makefile.inc b/src/soc/intel/skylake/nhlt/Makefile.inc
index e02248214c13..b5b77eb8345c 100644
--- a/src/soc/intel/skylake/nhlt/Makefile.inc
+++ b/src/soc/intel/skylake/nhlt/Makefile.inc
@@ -2,15 +2,24 @@ ramstage-y += dmic.c
 ramstage-y += nau88l25.c
 ramstage-y += max98357.c
 ramstage-y += ssm4567.c
+ramstage-y += rt5663.c
+ramstage-y += max98927.c
 
 # DSP firmware settings files.
-NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/skylake
+ifeq ($(CONFIG_SOC_INTEL_KABYLAKE),y)
+NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/kabylake/nhlt-blobs
+else
+NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/skylake/nhlt-blobs
+endif
+
 DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin
 DMIC_2CH_48KHZ_32B = dmic-2ch-48khz-32b.bin
 DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin
 DMIC_4CH_48KHZ_32B = dmic-4ch-48khz-32b.bin
 NAU88L25 = nau88l25-2ch-48khz-24b.bin
 MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin
+MAX98927_RENDER = max98927-render-2ch-48khz-24b.bin
+RT5663 = rt5663-2ch-48khz-24b.bin
 SSM4567_RENDER = ssm4567-render-2ch-48khz-24b.bin
 SSM4567_CAPTURE = ssm4567-capture-4ch-48khz-32b.bin
 
@@ -45,3 +54,11 @@ $(SSM4567_RENDER)-type := raw
 cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_CAPTURE)
 $(SSM4567_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(SSM4567_CAPTURE)
 $(SSM4567_CAPTURE)-type := raw
+
+cbfs-files-$(CONFIG_NHLT_RT5663) += $(RT5663)
+$(RT5663)-file := $(NHLT_BLOB_PATH)/$(RT5663)
+$(RT5663)-type := raw
+
+cbfs-files-$(CONFIG_NHLT_MAX98927) += $(MAX98927_RENDER)
+$(MAX98927_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98927_RENDER)
+$(MAX98927_RENDER)-type := raw
diff --git a/src/soc/intel/skylake/nhlt/max98927.c b/src/soc/intel/skylake/nhlt/max98927.c
new file mode 100644
index 000000000000..77b72aa4e6cc
--- /dev/null
+++ b/src/soc/intel/skylake/nhlt/max98927.c
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/nhlt.h>
+
+static const struct nhlt_format_config max98927_render_formats[] = {
+	/* 48 KHz 24-bits per sample. */
+	{
+		.num_channels = 2,
+		.sample_freq_khz = 48,
+		.container_bits_per_sample = 32,
+		.valid_bits_per_sample = 24,
+		.speaker_mask = SPEAKER_FRONT_LEFT | SPEAKER_FRONT_RIGHT,
+		.settings_file = "max98927-render-2ch-48khz-24b.bin",
+	},
+};
+
+static const struct nhlt_endp_descriptor max98927_descriptors[] = {
+	{
+		.link = NHLT_LINK_SSP,
+		.device = NHLT_SSP_DEV_I2S,
+		.direction = NHLT_DIR_RENDER,
+		.vid = NHLT_VID,
+		.did = NHLT_DID_SSP,
+		.formats = max98927_render_formats,
+		.num_formats = ARRAY_SIZE(max98927_render_formats),
+	},
+};
+
+int nhlt_soc_add_max98927(struct nhlt *nhlt, int hwlink)
+{
+	/* Virtual bus id of SSP links are the hardware port ids proper. */
+	return nhlt_add_ssp_endpoints(nhlt, hwlink, max98927_descriptors,
+					ARRAY_SIZE(max98927_descriptors));
+}
diff --git a/src/soc/intel/skylake/nhlt/rt5663.c b/src/soc/intel/skylake/nhlt/rt5663.c
new file mode 100644
index 000000000000..c5a3f5393d39
--- /dev/null
+++ b/src/soc/intel/skylake/nhlt/rt5663.c
@@ -0,0 +1,75 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/nhlt.h>
+
+/*
+ * The same DSP firmware settings are used for both the capture and
+ * render endpoints.
+*/
+static const struct nhlt_format_config rt5663_formats[] = {
+	/* 48 KHz 24-bits per sample. */
+	{
+		.num_channels = 2,
+		.sample_freq_khz = 48,
+		.container_bits_per_sample = 32,
+		.valid_bits_per_sample = 24,
+		.speaker_mask = SPEAKER_FRONT_LEFT | SPEAKER_FRONT_RIGHT,
+		.settings_file = "rt5663-2ch-48khz-24b.bin",
+	},
+};
+
+/*
+ * The rt5663 just has headphones and a mic. Both the capture and render
+ * endpoints occupy the same virtual slot.
+*/
+static const struct nhlt_tdm_config tdm_config = {
+	.virtual_slot = 0,
+	.config_type = NHLT_TDM_BASIC,
+};
+
+static const struct nhlt_endp_descriptor rt5663_descriptors[] = {
+	/* Render Endpoint */
+	{
+		.link = NHLT_LINK_SSP,
+		.device = NHLT_SSP_DEV_I2S,
+		.direction = NHLT_DIR_RENDER,
+		.vid = NHLT_VID,
+		.did = NHLT_DID_SSP,
+		.cfg = &tdm_config,
+		.cfg_size = sizeof(tdm_config),
+		.formats = rt5663_formats,
+		.num_formats = ARRAY_SIZE(rt5663_formats),
+	},
+	/* Capture Endpoint */
+	{
+		.link = NHLT_LINK_SSP,
+		.device = NHLT_SSP_DEV_I2S,
+		.direction = NHLT_DIR_CAPTURE,
+		.vid = NHLT_VID,
+		.did = NHLT_DID_SSP,
+		.cfg = &tdm_config,
+		.cfg_size = sizeof(tdm_config),
+		.formats = rt5663_formats,
+		.num_formats = ARRAY_SIZE(rt5663_formats),
+	},
+};
+
+int nhlt_soc_add_rt5663(struct nhlt *nhlt, int hwlink)
+{
+	/* Virtual bus id of SSP links are the hardware port ids proper. */
+	return nhlt_add_ssp_endpoints(nhlt, hwlink, rt5663_descriptors,
+					ARRAY_SIZE(rt5663_descriptors));
+}