diff options
author | Matt DeVillier <matt.devillier@gmail.com> | 2020-03-15 16:12:58 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-17 08:20:38 +0000 |
commit | 2974ec2cbf6df4ca09cb472eb7465f3846c28747 (patch) | |
tree | e60b1e75db5ecc2916fc209f41d586c669e9c43b /src | |
parent | 2d977b2dcbe83b2518c172de52014fe781135bd2 (diff) | |
download | coreboot-2974ec2cbf6df4ca09cb472eb7465f3846c28747.tar.gz coreboot-2974ec2cbf6df4ca09cb472eb7465f3846c28747.tar.bz2 coreboot-2974ec2cbf6df4ca09cb472eb7465f3846c28747.zip |
soc/broadwell: remove unused function init_one_gpio()
Function was copied as part of upstreaming from Chromium tree,
but isn't used and has never been used best I can tell.
Change-Id: I53b8702c97d7a694450aa05ba49da6c26c30f725
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/broadwell/gpio.c | 48 | ||||
-rw-r--r-- | src/soc/intel/broadwell/include/soc/gpio.h | 1 |
2 files changed, 0 insertions, 49 deletions
diff --git a/src/soc/intel/broadwell/gpio.c b/src/soc/intel/broadwell/gpio.c index 81ad9d42663a..8975f5e91362 100644 --- a/src/soc/intel/broadwell/gpio.c +++ b/src/soc/intel/broadwell/gpio.c @@ -49,54 +49,6 @@ static int gpio_to_pirq(int gpio) }; } -void init_one_gpio(int gpio_num, struct gpio_config *config) -{ - u32 owner, route, irqen, reset; - int set, bit; - - if (gpio_num > MAX_GPIO_NUMBER || !config) - return; - - outl(config->conf0, GPIO_BASE_ADDRESS + GPIO_CONFIG0(gpio_num)); - outl(config->conf1, GPIO_BASE_ADDRESS + GPIO_CONFIG1(gpio_num)); - - /* Determine set and bit based on GPIO number */ - set = gpio_num >> 5; - bit = gpio_num % 32; - - /* Save settings from current GPIO config */ - owner = inl(GPIO_BASE_ADDRESS + GPIO_OWNER(set)); - route = inl(GPIO_BASE_ADDRESS + GPIO_ROUTE(set)); - irqen = inl(GPIO_BASE_ADDRESS + GPIO_IRQ_IE(set)); - reset = inl(GPIO_BASE_ADDRESS + GPIO_RESET(set)); - - owner |= config->owner << bit; - route |= config->route << bit; - irqen |= config->irqen << bit; - reset |= config->reset << bit; - - outl(owner, GPIO_BASE_ADDRESS + GPIO_OWNER(set)); - outl(route, GPIO_BASE_ADDRESS + GPIO_ROUTE(set)); - outl(irqen, GPIO_BASE_ADDRESS + GPIO_IRQ_IE(set)); - outl(reset, GPIO_BASE_ADDRESS + GPIO_RESET(set)); - - if (set == 0) { - u32 blink = inl(GPIO_BASE_ADDRESS + GPIO_BLINK); - blink |= config->blink << bit; - outl(blink, GPIO_BASE_ADDRESS + GPIO_BLINK); - } - - /* PIRQ to IO-APIC map */ - if (config->pirq == GPIO_PIRQ_APIC_ROUTE) { - u32 pirq2apic = inl(GPIO_BASE_ADDRESS + GPIO_PIRQ_APIC_EN); - set = gpio_to_pirq(gpio_num); - if (set >= 0) { - pirq2apic |= 1 << set; - outl(pirq2apic, GPIO_BASE_ADDRESS + GPIO_PIRQ_APIC_EN); - } - } -} - void init_gpios(const struct gpio_config config[]) { const struct gpio_config *entry; diff --git a/src/soc/intel/broadwell/include/soc/gpio.h b/src/soc/intel/broadwell/include/soc/gpio.h index c0ac13497bce..3c7f08ad97d1 100644 --- a/src/soc/intel/broadwell/include/soc/gpio.h +++ b/src/soc/intel/broadwell/include/soc/gpio.h @@ -175,7 +175,6 @@ struct gpio_config { } __packed; /* Configure GPIOs with mainboard provided settings */ -void init_one_gpio(int gpio_num, struct gpio_config *config); void init_gpios(const struct gpio_config config[]); /* Get GPIO pin value */ |