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| author | Felix Singer <felixsinger@posteo.net> | 2024-01-18 05:52:14 +0100 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-01-19 09:26:56 +0000 |
| commit | 2f21f5ec1db45fb66f1196ddf1b2f8f65e4d7f58 (patch) | |
| tree | 08570e2e0a72f818bccb1dc14ea0837dbf32329f /src | |
| parent | 0e1dd77723dce19f2204c310a489b1f04114acba (diff) | |
| download | coreboot-2f21f5ec1db45fb66f1196ddf1b2f8f65e4d7f58.tar.gz coreboot-2f21f5ec1db45fb66f1196ddf1b2f8f65e4d7f58.tar.bz2 coreboot-2f21f5ec1db45fb66f1196ddf1b2f8f65e4d7f58.zip | |
mb/hp/snb_ivb_desktops: Remove superfluous comments about PCI devices
Since all devicetrees from hp/snb_ivb_desktops are using the reference
names for PCI devices now, remove the equivalent comments documenting
their function.
Change-Id: I0974052c6c18f54b588d296c5c5d11e930f0fcd7
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80047
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/hp/snb_ivb_desktops/devicetree.cb | 54 | ||||
| -rw-r--r-- | src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb | 14 |
2 files changed, 34 insertions, 34 deletions
diff --git a/src/mainboard/hp/snb_ivb_desktops/devicetree.cb b/src/mainboard/hp/snb_ivb_desktops/devicetree.cb index f02ff761233c..d1aa57627abf 100644 --- a/src/mainboard/hp/snb_ivb_desktops/devicetree.cb +++ b/src/mainboard/hp/snb_ivb_desktops/devicetree.cb @@ -11,10 +11,10 @@ chip northbridge/intel/sandybridge device domain 0 on subsystemid 0x103c 0x1791 inherit - device ref host_bridge on end # Host bridge Host bridge - device ref peg10 on end # PCIe Bridge for discrete graphics - device ref igd on end # Internal graphics VGA controller - device ref peg60 off end # Extra x4 port on north bridge + device ref host_bridge on end + device ref peg10 on end + device ref igd on end + device ref peg60 off end chip southbridge/intel/bd82x6x # Intel Series 7 PCH register "docking_supported" = "0" @@ -29,25 +29,25 @@ chip northbridge/intel/sandybridge register "xhci_switchable_ports" = "0x0000000f" register "xhci_overcurrent_mapping" = "0x0000000f" - device ref xhci on end # xHCI - device ref mei1 on end # Management Engine Interface 1 - device ref mei2 off end # Management Engine Interface 2 - device ref me_ide_r off end # Management Engine IDE-R - device ref me_kt on end # Management Engine KT - device ref gbe on end # Intel Gigabit Ethernet - device ref ehci2 on end # USB2 EHCI #2 - device ref hda on end # High Definition Audio controller - device ref pcie_rp1 on end # PCIe Port #1 - device ref pcie_rp2 off end # PCIe Port #2 - device ref pcie_rp3 off end # PCIe Port #3 - device ref pcie_rp4 off end # PCIe Port #4 - device ref pcie_rp5 on end # PCIe Port #5 - device ref pcie_rp6 off end # PCIe Port #6 - device ref pcie_rp7 off end # PCIe Port #7 - device ref pcie_rp8 off end # PCIe Port #8 - device ref ehci1 on end # USB2 EHCI #1 - device ref pci_bridge on end # PCI bridge - device ref lpc on # LPC bridge PCI-LPC bridge + device ref xhci on end + device ref mei1 on end + device ref mei2 off end + device ref me_ide_r off end + device ref me_kt on end + device ref gbe on end + device ref ehci2 on end + device ref hda on end + device ref pcie_rp1 on end + device ref pcie_rp2 off end + device ref pcie_rp3 off end + device ref pcie_rp4 off end + device ref pcie_rp5 on end + device ref pcie_rp6 off end + device ref pcie_rp7 off end + device ref pcie_rp8 off end + device ref ehci1 on end + device ref pci_bridge on end + device ref lpc on chip superio/common device pnp 2e.ff on # passes SIO base addr to SSDT gen chip superio/nuvoton/npcd378 @@ -152,10 +152,10 @@ chip northbridge/intel/sandybridge device pnp 4e.0 on end # TPM module end end - device ref sata1 on end # SATA Controller 1 - device ref smbus on end # SMBus - device ref sata2 off end # SATA Controller 2 - device ref thermal off end # Thermal + device ref sata1 on end + device ref smbus on end + device ref sata2 off end + device ref thermal off end end end end diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb index 3634b9005e53..b82ff8abfb68 100644 --- a/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb @@ -3,16 +3,16 @@ chip northbridge/intel/sandybridge device domain 0 on subsystemid 0x103c 0x1791 inherit - device ref peg60 on end # Extra x4 port on north bridge + device ref peg60 on end chip southbridge/intel/bd82x6x register "sata_port_map" = "0x3f" - device ref pcie_rp2 on end # PCIe Port #2 - device ref pcie_rp3 on end # PCIe Port #3 - device ref pcie_rp4 on end # PCIe Port #4 - device ref pcie_rp6 on end # PCIe Port #6 - device ref pcie_rp7 on end # PCIe Port #7 - device ref pcie_rp8 on end # PCIe Port #8 + device ref pcie_rp2 on end + device ref pcie_rp3 on end + device ref pcie_rp4 on end + device ref pcie_rp6 on end + device ref pcie_rp7 on end + device ref pcie_rp8 on end end end end |