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| author | Harrie Paijmans <hpaijmans@eltan.com> | 2025-04-09 15:18:45 +0200 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@gmail.com> | 2025-04-14 13:54:31 +0000 |
| commit | 2f28ec300e81f23e5300ca9316a0c390037e3a29 (patch) | |
| tree | 36abc95e14cacc601c5e8295e512d674598ad19c /src | |
| parent | b46c6ec181c57f862f63142cb9ae3b9db3120c60 (diff) | |
| download | coreboot-2f28ec300e81f23e5300ca9316a0c390037e3a29.tar.gz coreboot-2f28ec300e81f23e5300ca9316a0c390037e3a29.tar.bz2 coreboot-2f28ec300e81f23e5300ca9316a0c390037e3a29.zip | |
device/pci_ids: Add Raptor Lake P root port ID
Add Raptor Lake P specific PCIe root port ID.
Based on intel document 640552 rev 2.81.
BUG=NA
TEST=Customer platform with Raptorlake-P
Change-Id: Ifa7c131b5ae47294c055b9e68dad2764607c032b
Signed-off-by: Harrie Paijmans <hpaijmans@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87244
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/device/pci_ids.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/pcie/pcie.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 6a45fbb4a8b2..fdcddb2ffe7b 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3607,6 +3607,7 @@ #define PCI_DID_INTEL_RPL_P_PCIE_RP1 0xa74d #define PCI_DID_INTEL_RPL_P_PCIE_RP2 0xa70d #define PCI_DID_INTEL_RPL_P_PCIE_RP3 0xa72d +#define PCI_DID_INTEL_RPL_P_PCIE_RP4 0xa73d #define PCI_DID_INTEL_LNL_PCIE_RP1 0xa838 #define PCI_DID_INTEL_LNL_PCIE_RP2 0xa839 diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index ddea3b667b43..6a1225d62b8a 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -100,6 +100,7 @@ static const unsigned short pcie_device_ids[] = { PCI_DID_INTEL_RPL_P_PCIE_RP1, PCI_DID_INTEL_RPL_P_PCIE_RP2, PCI_DID_INTEL_RPL_P_PCIE_RP3, + PCI_DID_INTEL_RPL_P_PCIE_RP4, PCI_DID_INTEL_MTL_SOC_PCIE_RP1, PCI_DID_INTEL_MTL_SOC_PCIE_RP2, PCI_DID_INTEL_MTL_SOC_PCIE_RP3, |