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| author | Felix Held <felix-coreboot@felixheld.de> | 2025-04-15 20:07:24 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2025-04-17 12:50:08 +0000 |
| commit | 321f30d89e2f7131e936932ca3207b8a3491b67a (patch) | |
| tree | fca1687d3ba5114b6cf13956b2584ba66250add2 /src | |
| parent | deda4ee3040ed770724a1c3792ac8906f905be9a (diff) | |
| download | coreboot-321f30d89e2f7131e936932ca3207b8a3491b67a.tar.gz coreboot-321f30d89e2f7131e936932ca3207b8a3491b67a.tar.bz2 coreboot-321f30d89e2f7131e936932ca3207b8a3491b67a.zip | |
soc/amd: select RESET_VECTOR_IN_RAM from common non-CAR Kconfig
Select RESET_VECTOR_IN_RAM from the common SOC_AMD_COMMON_BLOCK_NONCAR
Kconfig option instead of selecting it in each AMD SoC's Kconfig which
selects SOC_AMD_COMMON_BLOCK_NONCAR.
From family 17h on, the AMD SoCs don't use cache as RAM (CAR) any more.
In most cases, including the coreboot case, the PSP puts coreboot's
bootblock into DRAM, thus RESET_VECTOR_IN_RAM needs to be selected.
There might be a case where the RESET_VECTOR_IN_RAM part isn't true, but
that isn't specific to a SoC generation, so even this unlikely case
doesn't prevent us from moving the selection of the Kconfig option to
the common non-CAR Kconfig option.
Change-Id: I87d7908f94505647f504f9d214e3c52f9c3a3715
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87322
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/genoa_poc/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/glinda/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/phoenix/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 1 |
7 files changed, 1 insertions, 6 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index d0a2c5ec744e..96e4f31e508d 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -23,7 +23,6 @@ config SOC_AMD_CEZANNE select PROVIDES_ROM_SHARING select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK select PSP_VERSTAGE_MAP_ENTIRE_SPIROM if VBOOT_STARTS_BEFORE_BOOTBLOCK - select RESET_VECTOR_IN_RAM select RTC select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_ACP_GEN1 diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig index 0b44c556498f..44ea1eb84467 100644 --- a/src/soc/amd/common/block/cpu/Kconfig +++ b/src/soc/amd/common/block/cpu/Kconfig @@ -16,6 +16,7 @@ config SOC_AMD_COMMON_BLOCK_CAR config SOC_AMD_COMMON_BLOCK_NONCAR bool select RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT + select RESET_VECTOR_IN_RAM help From family 17h on AMD CPUs/APUs don't use cache as RAM (CAR) any more, since the RAM initialization is already done by the PSP when diff --git a/src/soc/amd/genoa_poc/Kconfig b/src/soc/amd/genoa_poc/Kconfig index 503b9fd9994e..4754af185f52 100644 --- a/src/soc/amd/genoa_poc/Kconfig +++ b/src/soc/amd/genoa_poc/Kconfig @@ -13,7 +13,6 @@ config SOC_SPECIFIC_OPTIONS select HAVE_ACPI_TABLES select HAVE_X86_64_SUPPORT select HAVE_SMI_HANDLER - select RESET_VECTOR_IN_RAM select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_ACPI select SOC_AMD_COMMON_BLOCK_ACPIMMIO diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index 17b349f0712b..9cc446c679fc 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -25,7 +25,6 @@ config SOC_AMD_GLINDA select PROVIDES_ROM_SHARING select PSP_SUPPORTS_EFS2_RELATIVE_ADDR if VBOOT_STARTS_BEFORE_BOOTBLOCK select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK - select RESET_VECTOR_IN_RAM select RTC select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_ACP_GEN2 # TODO: Check if this is still correct diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index b51e9e9f54db..2adb0122648e 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -25,7 +25,6 @@ config SOC_AMD_REMBRANDT_BASE select PSP_INCLUDES_HSP select PSP_SUPPORTS_EFS2_RELATIVE_ADDR if VBOOT_STARTS_BEFORE_BOOTBLOCK select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK - select RESET_VECTOR_IN_RAM select RTC select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_ACP_GEN2 diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig index 07b1bc0b8361..995b1cc535f7 100644 --- a/src/soc/amd/phoenix/Kconfig +++ b/src/soc/amd/phoenix/Kconfig @@ -22,7 +22,6 @@ config SOC_AMD_PHOENIX_BASE select PSP_SUPPORTS_EFS2_RELATIVE_ADDR if VBOOT_STARTS_BEFORE_BOOTBLOCK # TODO: (b/303516266) Re-enable CCP DMA after addressing a stall # select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK - select RESET_VECTOR_IN_RAM select RTC select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_ACP_GEN2 diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index f450e294d720..5678aaf1fb00 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -19,7 +19,6 @@ config SOC_AMD_PICASSO select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING - select RESET_VECTOR_IN_RAM select RTC select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_ACP_GEN1 |