* fix a minor power state issue in the ich7 smm handler

* move mainboard dependent code into a mainboard SMI handler.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

6 files changed, 81 insertions, 30 deletions

diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index 0dc8926653df..8d2e22a3815c 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -129,7 +129,18 @@ void console_tx_byte(unsigned char byte)
 
 void io_trap_handler(int smif)
 {
-	southbridge_io_trap_handler(smif);
+	/* If a handler function handled a given IO trap, it
+	 * shall return a non-zero value
+	 */
+        printk_debug("SMI function trap 0x%x: ", smif);
+
+	if (southbridge_io_trap_handler(smif))
+		return;
+
+	if (mainboard_io_trap_handler(smif))
+		return;
+
+	printk_debug("Unknown function\n");
 }
 
 /**
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 1eef6382c7db..3122be1bcdf3 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -249,3 +249,8 @@ typedef struct {
 	};
 } smm_state_save_area_t;
 
+
+/* SMI handler function prototypes */
+int southbridge_io_trap_handler(int smif);
+int mainboard_io_trap_handler(int smif);
+
diff --git a/src/mainboard/kontron/986lcd-m/Config.lb b/src/mainboard/kontron/986lcd-m/Config.lb
index 833478bb79e8..3e378273c2e5 100644
--- a/src/mainboard/kontron/986lcd-m/Config.lb
+++ b/src/mainboard/kontron/986lcd-m/Config.lb
@@ -76,6 +76,7 @@ driver mainboard.o
 driver rtl8168.o
 if HAVE_MP_TABLE object mptable.o end
 if HAVE_PIRQ_TABLE object irq_tables.o end
+if HAVE_SMI_HANDLER smmobject mainboard_smi.o end
 
 if HAVE_ACPI_TABLES
 	object fadt.o
diff --git a/src/mainboard/kontron/986lcd-m/mainboard_smi.c b/src/mainboard/kontron/986lcd-m/mainboard_smi.c
new file mode 100644
index 000000000000..8896d9fd478d
--- /dev/null
+++ b/src/mainboard/kontron/986lcd-m/mainboard_smi.c
@@ -0,0 +1,50 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <console/console.h>
+#include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
+
+int mainboard_io_trap_handler(int smif)
+{
+	global_nvs_t *gnvs = (global_nvs_t *)0xc00;
+
+	switch (smif) {
+	case 0x99:
+		printk_debug("Sample\n");
+		gnvs->smif = 0;
+		break;
+	default:
+		return 0;
+	}
+
+	/* On success, the IO Trap Handler returns 0
+	 * On failure, the IO Trap Handler returns a value != 0
+	 *
+	 * For now, we force the return value to 0 and log all traps to
+	 * see what's going on.
+	 */
+	//gnvs->smif = 0;
+	return 1;
+}
+
+
diff --git a/src/southbridge/intel/i82801gx/i82801gx_smi.c b/src/southbridge/intel/i82801gx/i82801gx_smi.c
index 8aae3b14d72f..ccbb7334e576 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_smi.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_smi.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2008 coresystems GmbH
+ * Copyright (C) 2008-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
diff --git a/src/southbridge/intel/i82801gx/i82801gx_smihandler.c b/src/southbridge/intel/i82801gx/i82801gx_smihandler.c
index 11096fecd15f..d2826c6aca6b 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_smihandler.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_smihandler.c
@@ -31,9 +31,10 @@
 
 #define DEBUG_SMI
 
-#define ACPI_DISABLE	0x1e
-#define ACPI_ENABLE	0xe1
-
+#define APM_CNT		0xb2
+#define APM_STS		0xb3
+#define   ACPI_DISABLE	0x1e
+#define   ACPI_ENABLE	0xe1
 
 /* I945 */
 #define SMRAM		0x9d
@@ -241,37 +242,18 @@ static void dump_tco_status(u32 tco_sts)
  */
 #include "../../../northbridge/intel/i945/pcie_config.c"
 
-void southbridge_io_trap_handler(int smif)
+int southbridge_io_trap_handler(int smif)
 {
-	u8 reg8;
 	global_nvs_t *gnvs = (global_nvs_t *)0xc00;
 
-	printk_debug("SMI function trap 0x%x: ", smif);
-
 	switch (smif) {
 	case 0x32:
 		printk_debug("OS Init\n");
 		//gnvs->smif = 0;
 		break;
-	case 0xd5:
-		printk_debug("Set Brightness\n");
-		reg8 = gnvs->brtl;
-		printk_debug("brtl: %x\n", reg8);
-		outb(0x17, 0x66);
-		outb(reg8, 0x62);
-		//gnvs->smif = 0;
-		break;
-	case 0xd6:
-		printk_debug("Get Brightness\n");
-		outb(0x17, 0x66);
-		reg8 = inb(0x62);
-		printk_debug("brtl: %x\n", reg8);
-		gnvs->brtl = reg8;
-		//gnvs->smif = 0;
-		break;
 	default:
-		printk_debug("Unknown function\n");
-		break;
+		/* Not handled */
+		return 0;
 	}
 
 	/* On success, the IO Trap Handler returns 0
@@ -281,6 +263,7 @@ void southbridge_io_trap_handler(int smif)
 	 * see what's going on.
 	 */
 	//gnvs->smif = 0;
+	return 1; /* IO trap handled */
 }
 
 /**
@@ -423,12 +406,13 @@ void southbridge_smi_handler(unsigned int node, smm_state_save_area_t *state_sav
 		 */
 
 		/* Write back to the SLP register to cause the
-		 * originally intended event again.
+		 * originally intended event again. We need to set BIT13
+		 * (SLP_EN) though to make the sleep happen.
 		 */
 		reg32 = inl(pmbase + 0x04);
-		printk_debug("SMI#: SLP = 0x%08x\n");
+		printk_debug("SMI#: SLP = 0x%08x\n", reg32);
 		printk_debug("SMI#: Powering off.\n");
-		outl(reg32, pmbase + 0x04);
+		outl(reg32 | (1 << 13), pmbase + 0x04);
 	}
 
 }