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author | Elyes Haouas <ehaouas@noos.fr> | 2022-02-11 22:01:57 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-22 21:17:15 +0000 |
commit | 4450bee6b35e356bc60fd30a9b0e9289378da336 (patch) | |
tree | 4ce254a6f3c06ff233f3b4ad45ba92bd63eb1abb /src | |
parent | 090fcec9456f493eb8019dea5832c592be2df924 (diff) | |
download | coreboot-4450bee6b35e356bc60fd30a9b0e9289378da336.tar.gz coreboot-4450bee6b35e356bc60fd30a9b0e9289378da336.tar.bz2 coreboot-4450bee6b35e356bc60fd30a9b0e9289378da336.zip |
sb/amd/pi/hudson/early_setup.c: Fix typo in comment
Change-Id: Ib631cdc0794dc91df27cb984d5c585e0eee4a2ad
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61877
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/southbridge/amd/pi/hudson/early_setup.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c index 26179859ccd6..95c6d356c1c5 100644 --- a/src/southbridge/amd/pi/hudson/early_setup.c +++ b/src/southbridge/amd/pi/hudson/early_setup.c @@ -77,7 +77,7 @@ void hudson_lpc_decode(void) pm_write8(0xec, pm_read8(0xec) | 0x01); const pci_devfn_t dev = PCI_DEV(0, 0x14, 3); - /* Serial port numeration on Hudson: + /* Serial port enumeration on Hudson: * PORT0 - 0x3f8 * PORT1 - 0x2f8 * PORT5 - 0x2e8 |