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| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2022-01-19 12:42:56 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-01-20 16:21:56 +0000 |
| commit | 47486b92ced6ad544362ef531334409cfcfc56e4 (patch) | |
| tree | c96725f9489d049429e382a1fa037c8a2e68f6b2 /src | |
| parent | 1c5cc56acca902811dd3d11c1018d24980a31515 (diff) | |
| download | coreboot-47486b92ced6ad544362ef531334409cfcfc56e4.tar.gz coreboot-47486b92ced6ad544362ef531334409cfcfc56e4.tar.bz2 coreboot-47486b92ced6ad544362ef531334409cfcfc56e4.zip | |
mb/google/brya: Add MEMORY_SODIMM and MEMORY_SOLDERDOWN config
MEMORY_SOLDERDOWN puts SPD in cbfs and read part number from CBI.
MEMORY_SODIMM puts SPD cache in FMAP.
BUG=b:208910227
BRANCH=None
TEST=util/abuild/abuild -p none -t google/brya -x -a
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Idab48293fb5b584ecb4c8f270d2c376456954553
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61193
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/Kconfig | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 447d04a76fbc..15e09e8dcd58 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -40,8 +40,7 @@ config BOARD_GOOGLE_BRYA_COMMON config BOARD_GOOGLE_BASEBOARD_BRYA def_bool n select BOARD_GOOGLE_BRYA_COMMON - select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS - select HAVE_SPD_IN_CBFS + select MEMORY_SOLDERDOWN select SOC_INTEL_ALDERLAKE_PCH_P select SYSTEM_TYPE_LAPTOP @@ -49,11 +48,11 @@ config BOARD_GOOGLE_BASEBOARD_BRASK def_bool n select BOARD_GOOGLE_BRYA_COMMON select ENABLE_TCSS_DISPLAY_DETECTION if RUN_FSP_GOP + select MEMORY_SODIMM select RT8168_GEN_ACPI_POWER_RESOURCE select RT8168_GET_MAC_FROM_VPD select RT8168_SET_LED_MODE select SOC_INTEL_ALDERLAKE_PCH_P - select SPD_CACHE_IN_FMAP config BOARD_GOOGLE_BASEBOARD_NISSA def_bool n @@ -214,4 +213,13 @@ config USE_ADL_NEM endchoice +config MEMORY_SODIMM + def_bool n + select SPD_CACHE_IN_FMAP + +config MEMORY_SOLDERDOWN + def_bool n + select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS + select HAVE_SPD_IN_CBFS + endif # BOARD_GOOGLE_BRYA_COMMON |