summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2021-09-27 12:26:07 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-09-29 10:04:44 +0000
commit477647cef59b5da8055f5fd9b7d9990b2cfa59ce (patch)
treee982181b5e91d00ec989c81f3fb09d09528c40a6 /src
parent2fd1e47313aa3132be1bd8c3210a694980e6e379 (diff)
downloadcoreboot-477647cef59b5da8055f5fd9b7d9990b2cfa59ce.tar.gz
coreboot-477647cef59b5da8055f5fd9b7d9990b2cfa59ce.tar.bz2
coreboot-477647cef59b5da8055f5fd9b7d9990b2cfa59ce.zip
{sb,soc}/intel: Drop unused globalnvs.asl methods
These methods are never used in the code. Drop them. Change-Id: If5568b494f821d2647ada5ae845bcd015708520e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57984 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/baytrail/acpi/globalnvs.asl28
-rw-r--r--src/soc/intel/braswell/acpi/globalnvs.asl28
-rw-r--r--src/soc/intel/broadwell/pch/acpi/globalnvs.asl36
-rw-r--r--src/soc/intel/denverton_ns/acpi/globalnvs.asl28
-rw-r--r--src/soc/intel/skylake/acpi/globalnvs.asl24
-rw-r--r--src/southbridge/intel/bd82x6x/acpi/globalnvs.asl51
-rw-r--r--src/southbridge/intel/lynxpoint/acpi/globalnvs.asl40
7 files changed, 0 insertions, 235 deletions
diff --git a/src/soc/intel/baytrail/acpi/globalnvs.asl b/src/soc/intel/baytrail/acpi/globalnvs.asl
index 75682fa5e1b7..1654cd876f5d 100644
--- a/src/soc/intel/baytrail/acpi/globalnvs.asl
+++ b/src/soc/intel/baytrail/acpi/globalnvs.asl
@@ -42,31 +42,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
, 32, /* 0x34 - Top of Low Memory */
CBMC, 32, /* 0x38 - coreboot mem console pointer */
}
-
-/* Set flag to enable USB charging in S3 */
-Method (S3UE)
-{
- Store (One, \S3U0)
- Store (One, \S3U1)
-}
-
-/* Set flag to disable USB charging in S3 */
-Method (S3UD)
-{
- Store (Zero, \S3U0)
- Store (Zero, \S3U1)
-}
-
-/* Set flag to enable USB charging in S5 */
-Method (S5UE)
-{
- Store (One, \S5U0)
- Store (One, \S5U1)
-}
-
-/* Set flag to disable USB charging in S5 */
-Method (S5UD)
-{
- Store (Zero, \S5U0)
- Store (Zero, \S5U1)
-}
diff --git a/src/soc/intel/braswell/acpi/globalnvs.asl b/src/soc/intel/braswell/acpi/globalnvs.asl
index f4b317661877..c0839e6e887f 100644
--- a/src/soc/intel/braswell/acpi/globalnvs.asl
+++ b/src/soc/intel/braswell/acpi/globalnvs.asl
@@ -43,31 +43,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
, 32, /* 0x34 - Top of Low Memory */
CBMC, 32, /* 0x38 - coreboot mem console pointer */
}
-
-/* Set flag to enable USB charging in S3 */
-Method (S3UE)
-{
- Store (One, \S3U0)
- Store (One, \S3U1)
-}
-
-/* Set flag to disable USB charging in S3 */
-Method (S3UD)
-{
- Store (Zero, \S3U0)
- Store (Zero, \S3U1)
-}
-
-/* Set flag to enable USB charging in S5 */
-Method (S5UE)
-{
- Store (One, \S5U0)
- Store (One, \S5U1)
-}
-
-/* Set flag to disable USB charging in S5 */
-Method (S5UD)
-{
- Store (Zero, \S5U0)
- Store (Zero, \S5U1)
-}
diff --git a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl
index ffca182ae524..bfc22fb3158c 100644
--- a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl
+++ b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl
@@ -33,39 +33,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
PM1I, 64, // 0x20 - 0x27 - PM1 wake status bit
GPEI, 64, // 0x28 - 0x2f - GPE wake status bit
}
-
-/* Set flag to enable USB charging in S3 */
-Method (S3UE)
-{
- \S3U0 = 1
-}
-
-/* Set flag to disable USB charging in S3 */
-Method (S3UD)
-{
- \S3U0 = 0
-}
-
-/* Set flag to enable USB charging in S5 */
-Method (S5UE)
-{
- \S5U0 = 1
-}
-
-/* Set flag to disable USB charging in S5 */
-Method (S5UD)
-{
- \S5U0 = 0
-}
-
-/* Set flag to enable 3G module in S3 */
-Method (S3GE)
-{
- \S33G = 1
-}
-
-/* Set flag to disable 3G module in S3 */
-Method (S3GD)
-{
- \S33G = 0
-}
diff --git a/src/soc/intel/denverton_ns/acpi/globalnvs.asl b/src/soc/intel/denverton_ns/acpi/globalnvs.asl
index cbed6cfd6aea..3100c1f8481c 100644
--- a/src/soc/intel/denverton_ns/acpi/globalnvs.asl
+++ b/src/soc/intel/denverton_ns/acpi/globalnvs.asl
@@ -46,31 +46,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
TSGB, 32, // 0x54 - TSEG Base
TSSZ, 32, // 0x58 - TSEG Size
}
-
-/* Set flag to enable USB charging in S3 */
-Method (S3UE)
-{
- \S3U0 = 1
- \S3U1 = 1
-}
-
-/* Set flag to disable USB charging in S3 */
-Method (S3UD)
-{
- \S3U0 = 0
- \S3U1 = 0
-}
-
-/* Set flag to enable USB charging in S5 */
-Method (S5UE)
-{
- \S5U0 = 1
- \S5U1 = 1
-}
-
-/* Set flag to disable USB charging in S5 */
-Method (S5UD)
-{
- \S5U0 = 0
- \S5U1 = 0
-}
diff --git a/src/soc/intel/skylake/acpi/globalnvs.asl b/src/soc/intel/skylake/acpi/globalnvs.asl
index ac5da558fcb3..3623656ea50f 100644
--- a/src/soc/intel/skylake/acpi/globalnvs.asl
+++ b/src/soc/intel/skylake/acpi/globalnvs.asl
@@ -45,27 +45,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
A4GB, 64, // 0x54 - 0x5B Base of above 4GB MMIO Resource
A4GS, 64, // 0x5C - 0x63 Length of above 4GB MMIO Resource
}
-
-/* Set flag to enable USB charging in S3 */
-Method (S3UE)
-{
- \S3U0 = 1
-}
-
-/* Set flag to disable USB charging in S3 */
-Method (S3UD)
-{
- \S3U0 = 0
-}
-
-/* Set flag to enable USB charging in S5 */
-Method (S5UE)
-{
- \S5U0 = 1
-}
-
-/* Set flag to disable USB charging in S5 */
-Method (S5UD)
-{
- \S5U0 = 0
-}
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
index 74bffe2bb737..8c9813e09132 100644
--- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
@@ -106,57 +106,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
CBMC, 32,
}
-/* Set flag to enable USB charging in S3 */
-Method (S3UE)
-{
- \S3U0 = 1
- \S3U1 = 1
-}
-
-/* Set flag to disable USB charging in S3 */
-Method (S3UD)
-{
- \S3U0 = 0
- \S3U1 = 0
-}
-
-/* Set flag to enable USB charging in S5 */
-Method (S5UE)
-{
- \S5U0 = 1
- \S5U1 = 1
-}
-
-/* Set flag to disable USB charging in S5 */
-Method (S5UD)
-{
- \S5U0 = 0
- \S5U1 = 0
-}
-
-/* Set flag to enable 3G module in S3 */
-Method (S3GE)
-{
- \S33G = 1
-}
-
-/* Set flag to disable 3G module in S3 */
-Method (S3GD)
-{
- \S33G = 0
-}
-
-/* Set XHCI Mode enable */
-Method (XHCE)
-{
- \XHCI = 1
-}
-
-/* Set XHCI Mode disable */
-Method (XHCD)
-{
- \XHCI = 0
-}
External (\_TZ.SKIN)
Method (TZUP)
diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
index 49e13cb8353d..754b161af507 100644
--- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
@@ -96,46 +96,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
GPEI, 32, // GPE Wake Source
}
-/* Set flag to enable USB charging in S3 */
-Method (S3UE)
-{
- \S3U0 = 1
- \S3U1 = 1
-}
-
-/* Set flag to disable USB charging in S3 */
-Method (S3UD)
-{
- \S3U0 = 0
- \S3U1 = 0
-}
-
-/* Set flag to enable USB charging in S5 */
-Method (S5UE)
-{
- \S5U0 = 1
- \S5U1 = 1
-}
-
-/* Set flag to disable USB charging in S5 */
-Method (S5UD)
-{
- \S5U0 = 0
- \S5U1 = 0
-}
-
-/* Set flag to enable 3G module in S3 */
-Method (S3GE)
-{
- \S33G = 1
-}
-
-/* Set flag to disable 3G module in S3 */
-Method (S3GD)
-{
- \S33G = 0
-}
-
External (\_TZ.SKIN)
Method (TZUP)