summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorJeremy Compostella <jeremy.compostella@intel.com>2022-12-01 15:07:51 -0700
committerMartin L Roth <gaumless@gmail.com>2022-12-17 20:51:38 +0000
commit50139d00bd5fdec1764c80fda846ecc1efcbfa5d (patch)
treee2123610aa0e33e879c0b523ca23c4474d7b9545 /src
parentfa83887e48f196cfa303ce6de32acf1dfec7cad9 (diff)
downloadcoreboot-50139d00bd5fdec1764c80fda846ecc1efcbfa5d.tar.gz
coreboot-50139d00bd5fdec1764c80fda846ecc1efcbfa5d.tar.bz2
coreboot-50139d00bd5fdec1764c80fda846ecc1efcbfa5d.zip
lib: Hook up libhwbase in romstage
It's hidden behind the configuration option `CONFIG_ROMSTAGE_LIBHWBASE'. This also adds some glue code to use the coreboot console for debug output and our monotonic timer framework as timer backend. Running Ada code in romstage and more particular libhwbase brings a few challenges as global initialized variables are not supported in Cache-As-Ram mode. 1. The libhwbase dynamic mmio driver implementation makes the Gnat compiler generate some global initialized variables. For this reason, when compiled for romstage or for romstage and ramstage the static mmio driver is enforced (`HWBASE_STATIC_MMIO'). 2. The Gnat compiler generates elaboration functions to initialize program data at runtime. These elaboration functions are called by the romstage_adainit() function. The data references symbols suffixed by `_E'. Even though these symbols, at compilation time, do not contain any data and are filled with zeros, the Gnat compiler installs them in the .data section. Since these symbols are actually filled with zeros, it is safe to install them in the .bss section. cf. https://docs.adacore.com/gnat_ugn-docs/html/gnat_ugn/gnat_ugn/elaboration_order_handling_in_gnat.html#elaboration-code This patch requires the libhwbase https://review.coreboot.org/c/libhwbase/+/69854 CL. BUG=b:252792591 BRANCH=firmware-brya-14505.B TEST=libhwbae compiles for romstage and loads successfully Change-Id: I670249d33506e886a683e55d1589cb2bf9b16aa3 Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70275 Reviewed-by: Boris Mittelberg <bmbm@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Tarun Tuli <taruntuli@google.com> Reviewed-by: Zhixing Ma <zhixing.ma@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/car.ld6
-rw-r--r--src/console/Makefile.inc2
-rw-r--r--src/lib/Kconfig19
-rw-r--r--src/lib/Makefile.inc20
4 files changed, 39 insertions, 8 deletions
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index 47afd78ba278..dc075c68014d 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -67,6 +67,12 @@
*(.bss.*)
*(.sbss)
*(.sbss.*)
+ /* '*_E' GNAT generated global variables actually are un-initialized
+ * (filled with zeros) variables which are initialized at
+ * runtime. Therefore, they can be placed in the _bss region. */
+#if CONFIG(ROMSTAGE_LIBHWBASE)
+ *(.data.hw__*_E)
+#endif
. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_ebss = .;
RECORD_SIZE(bss)
diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index e2a20d7ff79b..4296426a0526 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -5,6 +5,8 @@ ramstage-y += die.c
ifeq ($(CONFIG_HWBASE_DEBUG_CB),y)
ramstage-$(CONFIG_RAMSTAGE_LIBHWBASE) += hw-debug_sink.ads
ramstage-$(CONFIG_RAMSTAGE_LIBHWBASE) += hw-debug_sink.adb
+romstage-$(CONFIG_ROMSTAGE_LIBHWBASE) += hw-debug_sink.ads
+romstage-$(CONFIG_ROMSTAGE_LIBHWBASE) += hw-debug_sink.adb
endif
smm-$(CONFIG_DEBUG_SMI) += init.c console.c vtxprintf.c printk.c
diff --git a/src/lib/Kconfig b/src/lib/Kconfig
index d108962bac1e..23647947a4fc 100644
--- a/src/lib/Kconfig
+++ b/src/lib/Kconfig
@@ -21,6 +21,12 @@ config RAMSTAGE_LIBHWBASE
help
Selected by features that require `libhwbase` in ramstage.
+config ROMSTAGE_LIBHWBASE
+ bool
+ select ROMSTAGE_ADA
+ help
+ Selected by features that require `libhwbase` in romstage.
+
config FLATTENED_DEVICE_TREE
bool
help
@@ -68,11 +74,22 @@ config SPD_CACHE_FMAP_NAME
help
Name of the FMAP region created in the default FMAP to cache SPD data.
-if RAMSTAGE_LIBHWBASE
+if RAMSTAGE_LIBHWBASE && !ROMSTAGE_LIBHWBASE
config HWBASE_DYNAMIC_MMIO
def_bool y
+endif
+
+if ROMSTAGE_LIBHWBASE
+
+config HWBASE_STATIC_MMIO
+ def_bool y
+
+endif
+
+if RAMSTAGE_LIBHWBASE || ROMSTAGE_LIBHWBASE
+
config HWBASE_DEFAULT_MMCONF
hex
default ECAM_MMCONF_BASE_ADDRESS
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 3e5b151b1391..dcba0c61db6b 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -342,28 +342,34 @@ $(obj)/%.elf.rmod: $(obj)/%.elf | $(RMODTOOL)
romstage-$(CONFIG_ROMSTAGE_ADA) += cb.ads
ramstage-$(CONFIG_RAMSTAGE_ADA) += cb.ads
-ifeq ($(CONFIG_RAMSTAGE_LIBHWBASE),y)
+ifneq (,$(filter y, $(CONFIG_RAMSTAGE_LIBHWBASE) $(CONFIG_ROMSTAGE_LIBHWBASE)))
to-ada-hex = $(eval $(1) := 16\\\#$(patsubst 0x%,%,$($(1)))\\\#)
$(call to-ada-hex,CONFIG_HWBASE_DEFAULT_MMCONF)
+libhwbase-stages = $(foreach stage, romstage ramstage, \
+ $(if $(filter y,$(CONFIG_$(call toupper,$(stage))_LIBHWBASE)),$(stage)))
+
$(call add-special-class,hw)
-hw-handler = $(eval ramstage-srcs += $$(addprefix $(1),$(2)))
+hw-handler +=$(foreach stage, $(libhwbase-stages), \
+ $(eval $(stage)-srcs += $$(addprefix $(1),$(2))))
$(call add-special-class,hw-gen)
hw-gen-handler = \
$(eval additional-dirs += $(dir $(2))) \
- $(eval ramstage-srcs += $(2)) \
- $(eval ramstage-ads-deps += $(2)) \
- $(eval ramstage-adb-deps += $(2)) \
+ $(foreach stage, $(libhwbase-stages), \
+ $(eval $(stage)-srcs += $(2)) \
+ $(eval $(stage)-ads-deps += $(2)) \
+ $(eval $(stage)-adb-deps += $(2))) \
$(eval $(2): $(obj)/config.h)
subdirs-y += ../../3rdparty/libhwbase
-ramstage-$(CONFIG_HAVE_MONOTONIC_TIMER) += hw-time-timer.adb
+$(foreach stage,$(libhwbase-stages), \
+ $(eval $(stage)-$(CONFIG_HAVE_MONOTONIC_TIMER) += hw-time-timer.adb))
-endif # CONFIG_RAMSTAGE_LIBHWBASE
+endif # CONFIG_ROMSTAGE_LIBHWBASE || CONFIG_RAMSTAGE_LIBHWBASE
romstage-y += spd_bin.c