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| author | Subrata Banik <subrata.banik@intel.com> | 2019-03-27 18:17:13 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-04-02 02:18:24 +0000 |
| commit | 51c8532c6b7fcdbd9d658dc3517f021eece910e2 (patch) | |
| tree | ec389d81556d86caecb823342b9863564097b33a /src | |
| parent | 17fa9deef12ad895323cebf92806e92d1fd892c4 (diff) | |
| download | coreboot-51c8532c6b7fcdbd9d658dc3517f021eece910e2.tar.gz coreboot-51c8532c6b7fcdbd9d658dc3517f021eece910e2.tar.bz2 coreboot-51c8532c6b7fcdbd9d658dc3517f021eece910e2.zip | |
drivers/intel/fsp2_0: Use same stack with coreboot
This patch ensures to have same stack base for FSP and coreboot.
Feature added in FSP2.1
- Remove stack swapping from FSP.
- Stack will be shared between coreboot and FSP.
TEST=Build and boot FSP2.1 enable platform like dragonegg, iclrvp.
No car global variable corruption seen after enabling
this feature.
Change-Id: I673b4216d991d8ccad725c3931006a694184106c
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32079
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/intel/fsp2_0/memory_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index f7cf0dd42b66..985ee3a07f58 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -172,7 +172,7 @@ static enum cb_err setup_fsp_stack_frame(FSPM_ARCH_UPD *arch_upd, * top and does not reinitialize stack pointer. */ if (CONFIG(FSP_USES_CB_STACK)) { - arch_upd->StackBase = (void *)_car_stack_end; + arch_upd->StackBase = (void *)_car_stack_start; arch_upd->StackSize = CONFIG_DCACHE_BSP_STACK_SIZE; return CB_SUCCESS; } |