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| author | Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> | 2023-08-02 18:39:44 +0900 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-03 15:09:57 +0000 |
| commit | 572db7f4c78cdae0380b671a3c967c2b4f888bc7 (patch) | |
| tree | 7e95958006fee1fea2c4f9efba2447898a1aac4b /src | |
| parent | 10bd2a27b9188fdf41021890581b9b8bf91bfb07 (diff) | |
| download | coreboot-572db7f4c78cdae0380b671a3c967c2b4f888bc7.tar.gz coreboot-572db7f4c78cdae0380b671a3c967c2b4f888bc7.tar.bz2 coreboot-572db7f4c78cdae0380b671a3c967c2b4f888bc7.zip | |
mb/google/nissa/var/pirrha: Generate SPD ID for supported memory part
Add pirrha supported memory parts in mem_parts_used.txt, generate
SPD IDs for them.
1. K3KL8L80CM-MGCT (Samsung)
2. K3KL6L60GM-MGCT (Samsung)
BUG=b:292134655
BRANCH=nissa
TEST=FW_NAME=pirrha emerge-nissa coreboot chromeos-bootimage
Change-Id: Ib3f5a5e5c8296f976d92f0196026d7bb63845664
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76881
Reviewed-by: Derek Huang <derekhuang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
3 files changed, 14 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/pirrha/memory/Makefile.inc b/src/mainboard/google/brya/variants/pirrha/memory/Makefile.inc index eace2e443e20..248011d2bad0 100644 --- a/src/mainboard/google/brya/variants/pirrha/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/pirrha/memory/Makefile.inc @@ -1,5 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! -# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. +# Generated by: +# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/pirrha/memory src/mainboard/google/brya/variants/pirrha/memory/mem_parts_used.txt -SPD_SOURCES = placeholder +SPD_SOURCES = +SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 0(0b0000) Parts = K3KL8L80CM-MGCT +SPD_SOURCES += spd/lp5/set-0/spd-9.hex # ID = 1(0b0001) Parts = K3KL6L60GM-MGCT diff --git a/src/mainboard/google/brya/variants/pirrha/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/pirrha/memory/dram_id.generated.txt index fa247902eeee..2e5b4ad36140 100644 --- a/src/mainboard/google/brya/variants/pirrha/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/pirrha/memory/dram_id.generated.txt @@ -1 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/pirrha/memory src/mainboard/google/brya/variants/pirrha/memory/mem_parts_used.txt + DRAM Part Name ID to assign +K3KL8L80CM-MGCT 0 (0000) +K3KL6L60GM-MGCT 1 (0001) diff --git a/src/mainboard/google/brya/variants/pirrha/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/pirrha/memory/mem_parts_used.txt index 96211370d91b..9de4d151201e 100644 --- a/src/mainboard/google/brya/variants/pirrha/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/pirrha/memory/mem_parts_used.txt @@ -9,3 +9,5 @@ # See util/spd_tools/README.md for more details and instructions. # Part Name +K3KL8L80CM-MGCT +K3KL6L60GM-MGCT |