diff options
| author | Martin Roth <gaumless@gmail.com> | 2015-06-23 21:49:56 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-07-02 02:26:45 +0200 |
| commit | 57eff2a1924d9f0684630b593afe56a104603f90 (patch) | |
| tree | 13ef4cf6e69e1d12323fc47e10c271619857362d /src | |
| parent | 775d50828ef090339ae57d93da55f46676f4bf58 (diff) | |
| download | coreboot-57eff2a1924d9f0684630b593afe56a104603f90.tar.gz coreboot-57eff2a1924d9f0684630b593afe56a104603f90.tar.bz2 coreboot-57eff2a1924d9f0684630b593afe56a104603f90.zip | |
ifdfake: Add prompts and help for the regions in Kconfig
Update the ifdfake region questions in Kconfig with help descriptions
and prompts to allow values to be entered and not just use pre-defined
default values.
Change-Id: Ifdffadc3d74ec49492c2ded66623a1be6945425f
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/10649
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/southbridge/intel/common/firmware/Kconfig | 31 |
1 files changed, 27 insertions, 4 deletions
diff --git a/src/southbridge/intel/common/firmware/Kconfig b/src/southbridge/intel/common/firmware/Kconfig index 2767c0e3165a..092d2738513f 100644 --- a/src/southbridge/intel/common/firmware/Kconfig +++ b/src/southbridge/intel/common/firmware/Kconfig @@ -74,23 +74,46 @@ config BUILD_WITH_FAKE_IFD config IFD_BIOS_SECTION depends on BUILD_WITH_FAKE_IFD - string + string "BIOS Region Starting:Ending addresses within the ROM" default "" + help + The BIOS region is typically the size of the CBFS area, and is located + at the end of the ROM space. + + For an 8MB ROM with a 3MB CBFS area, this would look like: + 0x00500000:0x007fffff config IFD_ME_SECTION depends on BUILD_WITH_FAKE_IFD - string + string "ME/TXE Region Starting:Ending addresses within the ROM" default "" + help + The ME/TXE region typically starts at around 0x1000 and often fills the + ROM space not used by CBFS. + + For an 8MB ROM with a 3MB CBFS area, this might look like: + 0x00001000:0x004fffff config IFD_GBE_SECTION depends on BUILD_WITH_FAKE_IFD - string + string "GBE Region Starting:Ending addresses within the ROM" default "" + help + The Gigabit Ethernet ROM region is used when an Intel NIC is built into + the Southbridge/SOC and the platform uses this device instead of an external + PCIe NIC. It will be located between the ME/TXE and the BIOS region. + + Leave this empty if you're unsure. config IFD_PLATFORM_SECTION depends on BUILD_WITH_FAKE_IFD - string + string "Platform Region Starting:Ending addresses within the Rom" default "" + help + The Platform region is used for platform specific data. + It will be located between the ME/TXE and the BIOS region. + + Leave this empty if you're unsure. config LOCK_MANAGEMENT_ENGINE bool "Lock ME/TXE section" |