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| author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2021-08-10 12:39:32 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-09-29 06:57:15 +0000 |
| commit | 61be50dafb308f4b54a4ec329c324e2c89048f98 (patch) | |
| tree | 93b7094e2d9e66f6153de154574bd697ec262ab3 /src | |
| parent | 98affb68f04d74eebd4ce98a64b21935caf63562 (diff) | |
| download | coreboot-61be50dafb308f4b54a4ec329c324e2c89048f98.tar.gz coreboot-61be50dafb308f4b54a4ec329c324e2c89048f98.tar.bz2 coreboot-61be50dafb308f4b54a4ec329c324e2c89048f98.zip | |
soc/mediatek/mt8195: initialize DFD
DFD (Design for Debug) is a debugging tool, which scans
flip-flops and dumps to internal RAM on the WDT reset.
After system reboots, those values could be showed for
debugging.
BUG=b:192429713
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ied63913db94b2e52ab394a66c70f7edfd507c99b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57980
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/mediatek/mt8195/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/dfd.h | 12 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/soc.c | 12 |
3 files changed, 25 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index d15d4760c2f1..6540ce2288c9 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -52,6 +52,7 @@ romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c ramstage-y += ../common/auxadc.c ramstage-y += ../common/ddp.c ddp.c ramstage-y += devapc.c +ramstage-y += ../common/dfd.c ramstage-y += ../common/dpm.c ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += dpm_4ch.c ramstage-y += dp_intf.c dptx.c dptx_hal.c diff --git a/src/soc/mediatek/mt8195/include/soc/dfd.h b/src/soc/mediatek/mt8195/include/soc/dfd.h new file mode 100644 index 000000000000..123b56843345 --- /dev/null +++ b/src/soc/mediatek/mt8195/include/soc/dfd.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8195_DFD_H +#define SOC_MEDIATEK_MT8195_DFD_H + +#include <soc/dfd_common.h> + +/* DFD dump address and size need to be the same as defined in Kernel DTS. */ +#define DFD_DUMP_ADDRESS 0x6A000000 +#define DFD_DUMP_SIZE (1 * MiB) + +#endif diff --git a/src/soc/mediatek/mt8195/soc.c b/src/soc/mediatek/mt8195/soc.c index 638056487b37..399196489a9e 100644 --- a/src/soc/mediatek/mt8195/soc.c +++ b/src/soc/mediatek/mt8195/soc.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <bootmem.h> #include <device/device.h> #include <soc/devapc.h> +#include <soc/dfd.h> #include <soc/emi.h> #include <soc/hdmi.h> #include <soc/mcupm.h> @@ -10,6 +12,12 @@ #include <soc/ufs.h> #include <symbols.h> +void bootmem_platform_add_ranges(void) +{ + if (CONFIG(MTK_DFD)) + bootmem_add_range(DFD_DUMP_ADDRESS, DFD_DUMP_SIZE, BM_MEM_RESERVED); +} + static void soc_read_resources(struct device *dev) { ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB); @@ -21,6 +29,10 @@ static void soc_init(struct device *dev) dapc_init(); mcupm_init(); sspm_init(); + + if (CONFIG(MTK_DFD)) + dfd_init(); + ufs_disable_refclk(); hdmi_low_power_setting(); } |