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| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2022-07-28 16:52:32 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-08-01 12:35:19 +0000 |
| commit | 63696fcf90159179b8ecec264e8867ea884dd87d (patch) | |
| tree | e3e0e955acaeb6e9547ca3c8ef482ddbe6ef2828 /src | |
| parent | 51f914d4a49f47d1d81fa06232ea285f995e771a (diff) | |
| download | coreboot-63696fcf90159179b8ecec264e8867ea884dd87d.tar.gz coreboot-63696fcf90159179b8ecec264e8867ea884dd87d.tar.bz2 coreboot-63696fcf90159179b8ecec264e8867ea884dd87d.zip | |
soc/amd/sabrina: Enable HW Modexp engine
HW Modexp engine is verified to be working fine. Any verification
failures during PSP verstage are because the firmware body is not read
correctly. This might be because of the incorrect SPI ROM mapping. Hence
enable the HW modexp engine for keyblock, preamble and firmware body
verification.
BUG=b:240175446
TEST=Build and boot to OS in Skyrim with PSP verstage using one of the
FW slots.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I8f6742630a7049354a24053fce28c477e53259e6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66247
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/sabrina/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/psp_verstage/svc.c | 9 |
2 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig index ed739abcbab9..62ae5989f9d6 100644 --- a/src/soc/amd/sabrina/Kconfig +++ b/src/soc/amd/sabrina/Kconfig @@ -45,6 +45,7 @@ config SOC_SPECIFIC_OPTIONS select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING select PSP_SUPPORTS_EFS2_RELATIVE_ADDR if VBOOT_STARTS_BEFORE_BOOTBLOCK + # TODO: b/240175446 - Enable PSP DMA after verification select RESET_VECTOR_IN_RAM select RTC select SOC_AMD_COMMON diff --git a/src/soc/amd/sabrina/psp_verstage/svc.c b/src/soc/amd/sabrina/psp_verstage/svc.c index 5e26300f5661..ad52b6f39473 100644 --- a/src/soc/amd/sabrina/psp_verstage/svc.c +++ b/src/soc/amd/sabrina/psp_verstage/svc.c @@ -174,8 +174,13 @@ uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode uint32_t svc_modexp(struct mod_exp_params *mod_exp_param) { - /* TODO: b/240175446 Re-enable CCP DMA and svc_modexp later. */ - return 1; + uint32_t retval = 0; + struct cmd_param_modexp param = { + .ptr_modexp = mod_exp_param, + }; + SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)¶m, retval); + return retval; + } uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) |