diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-09-15 14:24:03 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-20 23:54:07 +0000 |
| commit | 64b4bddcbc2156e9a410f07e14e58cf01d579fdb (patch) | |
| tree | a9b5157046c8102a876166739b0ea00d9b8677d9 /src | |
| parent | d1fc8c13437da7326aaf189f1acc4fae4f6715b0 (diff) | |
| download | coreboot-64b4bddcbc2156e9a410f07e14e58cf01d579fdb.tar.gz coreboot-64b4bddcbc2156e9a410f07e14e58cf01d579fdb.tar.bz2 coreboot-64b4bddcbc2156e9a410f07e14e58cf01d579fdb.zip | |
soc/intel/baytrail: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to pmutil.c and add a helper
function to determine if failure occurred.
BUG=b:63054105
Change-Id: I1d90cc557225ddbba1787bf95eae0de623af487e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/baytrail/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/include/soc/pmc.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/pmutil.c | 22 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/southcluster.c | 18 |
4 files changed, 26 insertions, 18 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index edc77af094ce..ba9517d5dc2b 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -26,6 +26,7 @@ ramstage-y += gpio.c romstage-y += reset.c ramstage-y += reset.c ramstage-y += cpu.c +romstage-y += pmutil.c ramstage-y += pmutil.c smm-y += pmutil.c smm-y += smihandler.c diff --git a/src/soc/intel/baytrail/include/soc/pmc.h b/src/soc/intel/baytrail/include/soc/pmc.h index b65a3e8d8341..c287d9cea97a 100644 --- a/src/soc/intel/baytrail/include/soc/pmc.h +++ b/src/soc/intel/baytrail/include/soc/pmc.h @@ -288,6 +288,9 @@ void southcluster_log_state(void); static inline void southcluster_log_state(void) {} #endif +/* Return non-zero when RTC failure happened. */ +int rtc_failure(void); + #endif /* !defined(__ASSEMBLER__) && !defined(__ACPI__) */ #endif /* _BAYTRAIL_PMC_H_ */ diff --git a/src/soc/intel/baytrail/pmutil.c b/src/soc/intel/baytrail/pmutil.c index 375917434669..ab2a4ba6d4b4 100644 --- a/src/soc/intel/baytrail/pmutil.c +++ b/src/soc/intel/baytrail/pmutil.c @@ -15,6 +15,7 @@ #include <stdint.h> #include <arch/io.h> +#include <cbmem.h> #include <console/console.h> #include <soc/iomap.h> @@ -22,7 +23,7 @@ #include <soc/pci_devs.h> #include <soc/pmc.h> -#if defined(__SMM__) +#if defined(__SIMPLE_DEVICE__) static const device_t pcu_dev = PCI_DEV(0, PCU_DEV, 0); @@ -358,3 +359,22 @@ void clear_pmc_status(void) write32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1), gen_pmcon1 & ~RPS); write32((u32 *)(PMC_BASE_ADDRESS + PRSTS), prsts); } + +int rtc_failure(void) +{ + uint32_t gen_pmcon1; + int rtc_fail; + struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); + + if (ps != NULL) + gen_pmcon1 = ps->gen_pmcon1; + else + gen_pmcon1 = read32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1)); + + rtc_fail = !!(gen_pmcon1 & RPS); + + if (rtc_fail) + printk(BIOS_DEBUG, "RTC failure.\n"); + + return rtc_fail; +} diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 090b98802bbb..d16c4ff148c4 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -125,23 +125,7 @@ static void sc_read_resources(device_t dev) static void sc_rtc_init(void) { - uint32_t gen_pmcon1; - int rtc_fail; - struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); - - if (ps != NULL) { - gen_pmcon1 = ps->gen_pmcon1; - } else { - gen_pmcon1 = read32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1)); - } - - rtc_fail = !!(gen_pmcon1 & RPS); - - if (rtc_fail) { - printk(BIOS_DEBUG, "RTC failure.\n"); - } - - cmos_init(rtc_fail); + cmos_init(rtc_failure()); } /* |