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author | Qinghong Zeng <zengqinghong@huaqin.corp-partner.google.com> | 2025-04-09 11:34:49 +0800 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2025-04-14 06:03:50 +0000 |
commit | 695976f65f40d26f7cdcd73caac241904b467fbb (patch) | |
tree | 4f9884b0c0f74dbcf1c6431c6b74a555b7186e43 /src | |
parent | b1cad555124a23252fec24cdb1c988f83733906d (diff) | |
download | coreboot-695976f65f40d26f7cdcd73caac241904b467fbb.tar.gz coreboot-695976f65f40d26f7cdcd73caac241904b467fbb.tar.bz2 coreboot-695976f65f40d26f7cdcd73caac241904b467fbb.zip |
mb/google/nissa/var/teliks: Support x32 memory configuration
Use GPP_E19 level to determine whether x32 memory configuration is
supported.
BUG=b:409212347
TEST=emerge-nissa coreboot chromeos-bootimage
Change-Id: I152501858069b5164e8ea602373ed27a5288acb1
Signed-off-by: Qinghong Zeng <zengqinghong@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87233
Reviewed-by: Jayvik Desai <jayvik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/brya/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/google/brya/variants/teliks/Makefile.mk | 1 | ||||
-rw-r--r-- | src/mainboard/google/brya/variants/teliks/gpio.c | 5 | ||||
-rw-r--r-- | src/mainboard/google/brya/variants/teliks/memory.c | 20 |
4 files changed, 27 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 50a29590220b..fd1cf58e2225 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -620,6 +620,7 @@ config BOARD_GOOGLE_TELIKS select DRIVERS_INTEL_MIPI_CAMERA select HAVE_WWAN_POWER_SEQUENCE select SOC_INTEL_TWINLAKE + select ENFORCE_MEM_CHANNEL_DISABLE config BOARD_GOOGLE_TELITH select BOARD_GOOGLE_BASEBOARD_NISSA diff --git a/src/mainboard/google/brya/variants/teliks/Makefile.mk b/src/mainboard/google/brya/variants/teliks/Makefile.mk index f41cdfdb8a62..efe5002383aa 100644 --- a/src/mainboard/google/brya/variants/teliks/Makefile.mk +++ b/src/mainboard/google/brya/variants/teliks/Makefile.mk @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only bootblock-y += gpio.c +romstage-y += memory.c romstage-y += gpio.c ramstage-y += gpio.c diff --git a/src/mainboard/google/brya/variants/teliks/gpio.c b/src/mainboard/google/brya/variants/teliks/gpio.c index 0f33c2db6ebd..ef50145e386f 100644 --- a/src/mainboard/google/brya/variants/teliks/gpio.c +++ b/src/mainboard/google/brya/variants/teliks/gpio.c @@ -74,6 +74,9 @@ static const struct pad_config override_gpio_table[] = { /* R7 : DMIC_DATA_1A ==> NC */ PAD_NC_LOCK(GPP_R7, NONE, LOCK_CONFIG), + /* E19 : DDP1_CTRLDATA ==> GPP_E19_STRAP */ + PAD_CFG_GPI_LOCK(GPP_E19, DN_20K, LOCK_CONFIG), + /* Configure the virtual CNVi Bluetooth I2S GPIO pads */ /* BT_I2S_BCLK */ PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3), @@ -123,6 +126,8 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), + /* E19 : DDP1_CTRLDATA ==> GPP_E19_STRAP */ + PAD_CFG_GPI_LOCK(GPP_E19, DN_20K, LOCK_CONFIG), }; static const struct pad_config romstage_gpio_table[] = { diff --git a/src/mainboard/google/brya/variants/teliks/memory.c b/src/mainboard/google/brya/variants/teliks/memory.c new file mode 100644 index 000000000000..51a7ff504cb5 --- /dev/null +++ b/src/mainboard/google/brya/variants/teliks/memory.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <gpio.h> +#include <soc/romstage.h> + +uint8_t mb_get_channel_disable_mask(void) +{ + /* + * GPP_E19 High -> One RAM Chip + * GPP_E19 Low -> Two RAM Chip + */ + if (gpio_get(GPP_E19)) { + /* Disable all other channels except first two on each controller */ + return (BIT(2) | BIT(3)); + } + + return 0; +} |