diff options
| author | Keith Hui <buurin@gmail.com> | 2020-01-27 18:17:58 -0500 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-04-18 18:54:16 +0000 |
| commit | 75f4776610c7d24d0c48dc48ff2a236ea914a80c (patch) | |
| tree | da575f9b15d8e2b563317caa9399dbb02a032de1 /src | |
| parent | 3acf43c336a8ae83200e862aecbc7c2eb3e52893 (diff) | |
| download | coreboot-75f4776610c7d24d0c48dc48ff2a236ea914a80c.tar.gz coreboot-75f4776610c7d24d0c48dc48ff2a236ea914a80c.tar.bz2 coreboot-75f4776610c7d24d0c48dc48ff2a236ea914a80c.zip | |
asus/p2b*: Declare \_SB.PCI0.MBRS in DSDT
sb/intel/i82371eb/isa.c has code that fills this path with CPU info.
Because it was not declared in the DSDT, Linux kernel 4.4.18 as used in
Slackware 14.2 complains.
Change-Id: Ib85dd02504b068bb7ea71be2f22e425f3831595a
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38601
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/asus/p2b/dsdt.asl | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl index 05af7202c8a2..5bc5d72db9fb 100644 --- a/src/mainboard/asus/p2b/dsdt.asl +++ b/src/mainboard/asus/p2b/dsdt.asl @@ -166,6 +166,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, OEM_ID, ACPI_TABLE_CREATOR, 1) }) #include <northbridge/intel/i440bx/acpi/sb_pci0_crs.asl> + #include <southbridge/intel/i82371eb/acpi/isabridge.asl> /* Begin southbridge block */ Device (PX40) @@ -184,6 +185,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, OEM_ID, ACPI_TABLE_CREATOR, 1) Device (SYSR) { Name (_HID, EisaId ("PNP0C02")) + Name (_UID, 0x02) Method (_CRS, 0, NotSerialized) { Name (BUF1, ResourceTemplate () |