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author | Subrata Banik <subratabanik@google.com> | 2025-04-11 02:18:24 +0000 |
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committer | Subrata Banik <subratabanik@google.com> | 2025-04-12 17:33:58 +0000 |
commit | 78f95fc12c7e099ab61c99a3281d429226fda67a (patch) | |
tree | cabb49b030f488a40e2bb69d56e10b412c804346 /src | |
parent | b75669038a459a2c388f9f9e3c7d00dd98128707 (diff) | |
download | coreboot-78f95fc12c7e099ab61c99a3281d429226fda67a.tar.gz coreboot-78f95fc12c7e099ab61c99a3281d429226fda67a.tar.bz2 coreboot-78f95fc12c7e099ab61c99a3281d429226fda67a.zip |
soc/qualcomm: Use runtime check for QUP wrapper 2 init
Refactor the initialization logic for the optional QUPv3 wrapper 2.
Add a runtime check of the `QUP_WRAP2_BASE` macro's value within
`qupv3_fw_init`.
This approach simplifies the QUP wrapper 2 initialization, making the
code flow depend directly on whether a valid base address is defined
for the target SoC.
To facilitate this, explicitly define `QUP_WRAP2_BASE` as 0 (acting as
a dummy entry) for SoCs like sc7180 and sc7280 which do not include
this hardware block. The `if (QUP_WRAP2_BASE)` check will correctly
evaluate to false for these platforms, skipping the initialization.
Platforms that do have QUP wrapper 2 should define its non-zero base
address.
TEST=Able to build google/herobine.
Change-Id: I553ee4891abc5dd744b69bcbee1cca2efd993ef3
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/qualcomm/common/qupv3_config.c | 2 | ||||
-rw-r--r-- | src/soc/qualcomm/sc7180/include/soc/addressmap.h | 3 | ||||
-rw-r--r-- | src/soc/qualcomm/sc7280/include/soc/addressmap.h | 3 |
3 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/qualcomm/common/qupv3_config.c b/src/soc/qualcomm/common/qupv3_config.c index 636f9b2faba3..0b4d17ceb19c 100644 --- a/src/soc/qualcomm/common/qupv3_config.c +++ b/src/soc/qualcomm/common/qupv3_config.c @@ -262,4 +262,6 @@ void qupv3_fw_init(void) qup_common_init(QUP_WRAP0_BASE); qup_common_init(QUP_WRAP1_BASE); + if (QUP_WRAP2_BASE) + qup_common_init(QUP_WRAP2_BASE); } diff --git a/src/soc/qualcomm/sc7180/include/soc/addressmap.h b/src/soc/qualcomm/sc7180/include/soc/addressmap.h index f295ceea2212..e44539227409 100644 --- a/src/soc/qualcomm/sc7180/include/soc/addressmap.h +++ b/src/soc/qualcomm/sc7180/include/soc/addressmap.h @@ -34,6 +34,9 @@ #define QUP_SERIAL11_BASE 0x00A94000 #define QUP_WRAP1_BASE 0x00AC0000 +/* QUPV3_2 - Dummy Entry */ +#define QUP_WRAP2_BASE 0x00000000 + /* * USB BASE ADDRESSES */ diff --git a/src/soc/qualcomm/sc7280/include/soc/addressmap.h b/src/soc/qualcomm/sc7280/include/soc/addressmap.h index 342de9f9a4c8..fb5bf6f0d5f0 100644 --- a/src/soc/qualcomm/sc7280/include/soc/addressmap.h +++ b/src/soc/qualcomm/sc7280/include/soc/addressmap.h @@ -55,6 +55,9 @@ #define QUP_WRAP1_BASE 0x00AC0000 #define QUP_1_GSI_BASE 0x00A04000 +/* QUPV3_2 - Dummy Entry */ +#define QUP_WRAP2_BASE 0x00000000 + #define EPSSTOP_EPSS_TOP 0x18598000 #define EPSSFAST_BASE_ADDR 0x18580000 |