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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-10-05 14:47:00 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-14 20:19:46 +0000 |
| commit | 7f7b01d46747e0147cac4427a2667dd6bf213a91 (patch) | |
| tree | f591bcdc478a0e488b19773fff36d39c70f5cf41 /src | |
| parent | b3dcb96dc57ade665306e9c03f41353fd11737aa (diff) | |
| download | coreboot-7f7b01d46747e0147cac4427a2667dd6bf213a91.tar.gz coreboot-7f7b01d46747e0147cac4427a2667dd6bf213a91.tar.bz2 coreboot-7f7b01d46747e0147cac4427a2667dd6bf213a91.zip | |
soc/amd/sata.c: Hook up directly in devicetree
Cezanne has two SATA controllers, but doesn't select
SOC_AMD_COMMON_BLOCK_SATA, so it's not added to the SATA devices in the
Cezanne chipset devicetree.
Change-Id: If7f0a9638151cf981d891464a2c3a0ec5fc9c780
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68142
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/common/block/sata/sata.c | 19 | ||||
| -rw-r--r-- | src/soc/amd/picasso/chipset.cb | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/chipset_cz.cb | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/chipset_st.cb | 2 |
4 files changed, 4 insertions, 21 deletions
diff --git a/src/soc/amd/common/block/sata/sata.c b/src/soc/amd/common/block/sata/sata.c index 19a7d3edd5d5..6a271682c2e4 100644 --- a/src/soc/amd/common/block/sata/sata.c +++ b/src/soc/amd/common/block/sata/sata.c @@ -3,7 +3,6 @@ #include <acpi/acpigen.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <amdblocks/sata.h> static const char *sata_acpi_name(const struct device *dev) @@ -11,7 +10,7 @@ static const char *sata_acpi_name(const struct device *dev) return "STCR"; } -static struct device_operations sata_ops = { +struct device_operations amd_sata_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, @@ -20,19 +19,3 @@ static struct device_operations sata_ops = { .acpi_name = sata_acpi_name, .acpi_fill_ssdt = acpi_device_write_pci_dev, }; - -static const unsigned short pci_device_ids[] = { - PCI_DID_AMD_CZ_SATA, - PCI_DID_AMD_CZ_SATA_AHCI, - PCI_DID_AMD_FAM17H_SATA_AHCI_VER0, - PCI_DID_AMD_FAM17H_SATA_AHCI_VER1, - PCI_DID_AMD_FAM17H_SATA_AHCI_RAID_VER0, - PCI_DID_AMD_FAM17H_SATA_AHCI_RAID_VER1, - 0 -}; - -static const struct pci_driver sata0_driver __pci_driver = { - .ops = &sata_ops, - .vendor = PCI_VID_AMD, - .devices = pci_device_ids, -}; diff --git a/src/soc/amd/picasso/chipset.cb b/src/soc/amd/picasso/chipset.cb index b4479d7cc17e..ab286de86438 100644 --- a/src/soc/amd/picasso/chipset.cb +++ b/src/soc/amd/picasso/chipset.cb @@ -30,7 +30,7 @@ chip soc/amd/picasso end device pci 08.2 alias internal_bridge_b off # internal bridge to bus B ops amd_internal_pcie_gpp_ops - device pci 0.0 alias sata off end + device pci 0.0 alias sata off ops amd_sata_ops end device pci 0.1 alias xgbe_0 off end device pci 0.2 alias xgbe_1 off end end diff --git a/src/soc/amd/stoneyridge/chipset_cz.cb b/src/soc/amd/stoneyridge/chipset_cz.cb index dc510e171ee7..dbbbd4d3cf3c 100644 --- a/src/soc/amd/stoneyridge/chipset_cz.cb +++ b/src/soc/amd/stoneyridge/chipset_cz.cb @@ -26,7 +26,7 @@ chip soc/amd/stoneyridge device pci 09.0 alias hda_bridge off end # host audio bridge device pci 09.2 alias hda off end # main HD Audio Controller device pci 10.0 alias xhci off ops stoneyridge_usb_ops end - device pci 11.0 alias sata off end + device pci 11.0 alias sata off ops amd_sata_ops end device pci 12.0 alias ehci off ops stoneyridge_usb_ops end device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end diff --git a/src/soc/amd/stoneyridge/chipset_st.cb b/src/soc/amd/stoneyridge/chipset_st.cb index 4d9af9092a5a..4c244d0f0dbb 100644 --- a/src/soc/amd/stoneyridge/chipset_st.cb +++ b/src/soc/amd/stoneyridge/chipset_st.cb @@ -20,7 +20,7 @@ chip soc/amd/stoneyridge device pci 09.0 alias hda_bridge off end # host audio bridge device pci 09.2 alias hda off end # main HD Audio Controller device pci 10.0 alias xhci off ops stoneyridge_usb_ops end - device pci 11.0 alias sata off end + device pci 11.0 alias sata off ops amd_sata_ops end device pci 12.0 alias ehci off ops stoneyridge_usb_ops end device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end |