diff options
| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2021-11-03 12:32:34 +0600 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-11-09 20:48:26 +0000 |
| commit | 90d79a751b1c85f436ceb77f39cbeab4c8068b36 (patch) | |
| tree | 9a204d379717ed8e8a15492dda1a013cfe2e9029 /src | |
| parent | d0cef2ac6b0da7e7415bfeb154f0b6e2cfef51a0 (diff) | |
| download | coreboot-90d79a751b1c85f436ceb77f39cbeab4c8068b36.tar.gz coreboot-90d79a751b1c85f436ceb77f39cbeab4c8068b36.tar.bz2 coreboot-90d79a751b1c85f436ceb77f39cbeab4c8068b36.zip | |
mb/google/brya/var/redrix: Set RFI Spread Spectrum to 6%
Set RFI Spread Spectrum to 6% for Redrix as RF team request.
The default of Spread Spectrum in FSP is 1.5%, and set 1.5% in baseboard
as default.
BUG=b:200886627
TEST=build
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Change-Id: Id0b42446e9e46ef629b5ca8d5d29faf2d771348d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
3 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb index 76d437c69471..4ffc41dfa2c9 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb @@ -68,6 +68,9 @@ chip soc/intel/alderlake register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ" register "PchHdaIDispCodecEnable" = "1" + # FIVR RFI Spread Spectrum 1.5% + register "FivrSpreadSpectrum" = "FIVR_SS_1_5" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index 154f69799f4d..c89f24fde4d6 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -74,6 +74,9 @@ chip soc/intel/alderlake register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ" register "PchHdaIDispCodecEnable" = "1" + # FIVR RFI Spread Spectrum 1.5% + register "FivrSpreadSpectrum" = "FIVR_SS_1_5" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index 0ed6c529e377..ce9ba373a317 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -34,6 +34,8 @@ chip soc/intel/alderlake register "SaGv" = "SaGv_Enabled" register "CnviBtAudioOffload" = "true" + # FIVR RFI Spread Spectrum 6% + register "FivrSpreadSpectrum" = "FIVR_SS_6" # Intel Common SoC Config #+-------------------+---------------------------+ |