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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-11-25 09:07:56 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-11-28 10:26:27 +0000 |
| commit | 99166482fe4baa00780ca3b45fce6ae75c4cdbfb (patch) | |
| tree | 91dbc6ee21db8427ed8c82aeb079af2a74c3be6b /src | |
| parent | ac23f9da757e8e47a6bdcfd619c54e9b4c2b906c (diff) | |
| download | coreboot-99166482fe4baa00780ca3b45fce6ae75c4cdbfb.tar.gz coreboot-99166482fe4baa00780ca3b45fce6ae75c4cdbfb.tar.bz2 coreboot-99166482fe4baa00780ca3b45fce6ae75c4cdbfb.zip | |
sb,soc/intel: Drop spurious SMI entry message
The message only makes sense if ACPI PM base address is
allowed to be dynamic. If requested, it can be logged
in common code.
Change-Id: Iad7a60098c0391cc23384035af49e373dad90233
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/baytrail/smm.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/braswell/smm.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/smi.c | 5 | ||||
| -rw-r--r-- | src/soc/intel/denverton_ns/smm.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/common/smi.c | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smi.c | 5 |
6 files changed, 1 insertions, 22 deletions
diff --git a/src/soc/intel/baytrail/smm.c b/src/soc/intel/baytrail/smm.c index 3f3c53fa74b2..ed83173e6f45 100644 --- a/src/soc/intel/baytrail/smm.c +++ b/src/soc/intel/baytrail/smm.c @@ -27,8 +27,6 @@ void smm_southbridge_clear_state(void) if (CONFIG(ELOG)) southcluster_log_state(); - printk(BIOS_DEBUG, "Initializing Southbridge SMI..."); - printk(BIOS_SPEW, " pmbase = 0x%04x\n", get_pmbase()); smi_en = inl(get_pmbase() + SMI_EN); if (smi_en & APMC_EN) { diff --git a/src/soc/intel/braswell/smm.c b/src/soc/intel/braswell/smm.c index 3f3c53fa74b2..64e560ed423c 100644 --- a/src/soc/intel/braswell/smm.c +++ b/src/soc/intel/braswell/smm.c @@ -27,9 +27,6 @@ void smm_southbridge_clear_state(void) if (CONFIG(ELOG)) southcluster_log_state(); - printk(BIOS_DEBUG, "Initializing Southbridge SMI..."); - printk(BIOS_SPEW, " pmbase = 0x%04x\n", get_pmbase()); - smi_en = inl(get_pmbase() + SMI_EN); if (smi_en & APMC_EN) { printk(BIOS_INFO, "SMI# handler already enabled?\n"); diff --git a/src/soc/intel/broadwell/pch/smi.c b/src/soc/intel/broadwell/pch/smi.c index d7704fd8fa8b..51f31a1280c0 100644 --- a/src/soc/intel/broadwell/pch/smi.c +++ b/src/soc/intel/broadwell/pch/smi.c @@ -14,17 +14,12 @@ void smm_southbridge_clear_state(void) { u32 smi_en; - printk(BIOS_DEBUG, "Initializing Southbridge SMI..."); - printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", ACPI_BASE_ADDRESS); - smi_en = inl(ACPI_BASE_ADDRESS + SMI_EN); if (smi_en & APMC_EN) { printk(BIOS_INFO, "SMI# handler already enabled?\n"); return; } - printk(BIOS_DEBUG, "\n"); - /* Dump and clear status registers */ clear_smi_status(); clear_pm1_status(); diff --git a/src/soc/intel/denverton_ns/smm.c b/src/soc/intel/denverton_ns/smm.c index e7ed28d82775..bb399e81cac3 100644 --- a/src/soc/intel/denverton_ns/smm.c +++ b/src/soc/intel/denverton_ns/smm.c @@ -16,9 +16,6 @@ void smm_southbridge_clear_state(void) { uint32_t smi_en; - printk(BIOS_DEBUG, "Initializing Southbridge SMI..."); - printk(BIOS_SPEW, " pmbase = 0x%04x\n", get_pmbase()); - smi_en = inl((uint16_t)(get_pmbase() + SMI_EN)); if (smi_en & APMC_EN) { printk(BIOS_INFO, "SMI# handler already enabled?\n"); diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c index 20926e579e19..a6e000b23365 100644 --- a/src/southbridge/intel/common/smi.c +++ b/src/southbridge/intel/common/smi.c @@ -23,15 +23,12 @@ static int smi_enabled(void) if (CONFIG(ELOG)) pch_log_state(); - printk(BIOS_DEBUG, "Initializing southbridge SMI..."); - printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", lpc_get_pmbase()); - smi_en = read_pmbase32(SMI_EN); if (smi_en & APMC_EN) { printk(BIOS_INFO, "SMI# handler already enabled?\n"); return 1; } - printk(BIOS_DEBUG, "\n"); + return 0; } diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c index 6edf5c183605..9ae78793a267 100644 --- a/src/southbridge/intel/lynxpoint/smi.c +++ b/src/southbridge/intel/lynxpoint/smi.c @@ -17,17 +17,12 @@ void smm_southbridge_clear_state(void) if (CONFIG(ELOG)) pch_log_state(); - printk(BIOS_DEBUG, "Initializing Southbridge SMI..."); - printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", get_pmbase()); - smi_en = inl(get_pmbase() + SMI_EN); if (smi_en & APMC_EN) { printk(BIOS_INFO, "SMI# handler already enabled?\n"); return; } - printk(BIOS_DEBUG, "\n"); - /* Dump and clear status registers */ clear_smi_status(); clear_pm1_status(); |